x86_hybrid_pmuRegular
4.4: Absent ⚠️
4.8: Absent ⚠️
4.10: Absent ⚠️
4.13: Absent ⚠️
4.15: Absent ⚠️
4.18: Absent ⚠️
5.0: Absent ⚠️
5.3: Absent ⚠️
5.4: Absent ⚠️
5.8: Absent ⚠️
5.11: Absent ⚠️
5.13: ✅struct x86_hybrid_pmu {
struct pmu pmu;
const char *name;
u8 cpu_type;
cpumask_t supported_cpus;
union perf_capabilities intel_cap;
u64 intel_ctrl;
int max_pebs_events;
int num_counters;
int num_counters_fixed;
struct event_constraint unconstrained;
u64 hw_cache_event_ids[42];
u64 hw_cache_extra_regs[42];
struct event_constraint *event_constraints;
struct event_constraint *pebs_constraints;
struct extra_reg *extra_regs;
unsigned int late_ack;
unsigned int mid_ack;
unsigned int enabled_ack;
};
5.15: ✅struct x86_hybrid_pmu {
struct pmu pmu;
const char *name;
u8 cpu_type;
cpumask_t supported_cpus;
union perf_capabilities intel_cap;
u64 intel_ctrl;
int max_pebs_events;
int num_counters;
int num_counters_fixed;
struct event_constraint unconstrained;
u64 hw_cache_event_ids[42];
u64 hw_cache_extra_regs[42];
struct event_constraint *event_constraints;
struct event_constraint *pebs_constraints;
struct extra_reg *extra_regs;
unsigned int late_ack;
unsigned int mid_ack;
unsigned int enabled_ack;
};
5.19: ✅struct x86_hybrid_pmu {
struct pmu pmu;
const char *name;
u8 cpu_type;
cpumask_t supported_cpus;
union perf_capabilities intel_cap;
u64 intel_ctrl;
int max_pebs_events;
int num_counters;
int num_counters_fixed;
struct event_constraint unconstrained;
u64 hw_cache_event_ids[42];
u64 hw_cache_extra_regs[42];
struct event_constraint *event_constraints;
struct event_constraint *pebs_constraints;
struct extra_reg *extra_regs;
unsigned int late_ack;
unsigned int mid_ack;
unsigned int enabled_ack;
u64 pebs_data_source[16];
};
6.2: ✅struct x86_hybrid_pmu {
struct pmu pmu;
const char *name;
u8 cpu_type;
cpumask_t supported_cpus;
union perf_capabilities intel_cap;
u64 intel_ctrl;
int max_pebs_events;
int num_counters;
int num_counters_fixed;
struct event_constraint unconstrained;
u64 hw_cache_event_ids[42];
u64 hw_cache_extra_regs[42];
struct event_constraint *event_constraints;
struct event_constraint *pebs_constraints;
struct extra_reg *extra_regs;
unsigned int late_ack;
unsigned int mid_ack;
unsigned int enabled_ack;
u64 pebs_data_source[16];
};
6.5: ✅struct x86_hybrid_pmu {
struct pmu pmu;
const char *name;
u8 cpu_type;
cpumask_t supported_cpus;
union perf_capabilities intel_cap;
u64 intel_ctrl;
int max_pebs_events;
int num_counters;
int num_counters_fixed;
struct event_constraint unconstrained;
u64 hw_cache_event_ids[42];
u64 hw_cache_extra_regs[42];
struct event_constraint *event_constraints;
struct event_constraint *pebs_constraints;
struct extra_reg *extra_regs;
unsigned int late_ack;
unsigned int mid_ack;
unsigned int enabled_ack;
u64 pebs_data_source[16];
};
6.8: ✅struct x86_hybrid_pmu {
struct pmu pmu;
const char *name;
enum hybrid_pmu_type pmu_type;
cpumask_t supported_cpus;
union perf_capabilities intel_cap;
u64 intel_ctrl;
int max_pebs_events;
int num_counters;
int num_counters_fixed;
struct event_constraint unconstrained;
u64 hw_cache_event_ids[42];
u64 hw_cache_extra_regs[42];
struct event_constraint *event_constraints;
struct event_constraint *pebs_constraints;
struct extra_reg *extra_regs;
unsigned int late_ack;
unsigned int mid_ack;
unsigned int enabled_ack;
u64 pebs_data_source[16];
};
arm64: Absent ⚠️
armhf: Absent ⚠️
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Absent ⚠️
azure: Absent ⚠️
gcp: Absent ⚠️
lowlatency: Absent ⚠️
Regular
5.13 and 5.15 ✅
5.15 and 5.19 ⚠️u64 pebs_data_source[16]
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ⚠️enum hybrid_pmu_type pmu_type
u8 cpu_type