website-struct

Struct: `tegra_dfll`

Status

Regular

In 4.4: Absent ⚠️
In 4.8: Absent ⚠️
In 4.10: Absent ⚠️
In 4.13: Absent ⚠️
In 4.15: Absent ⚠️
In 4.18: Absent ⚠️
In 5.0: Absent ⚠️
In 5.3: Absent ⚠️
In 5.4: Absent ⚠️
In 5.8: Absent ⚠️
In 5.11: Absent ⚠️
In 5.13: Absent ⚠️
In 5.15: Absent ⚠️
In 5.19: Absent ⚠️
In 6.2: Absent ⚠️
In 6.5: Absent ⚠️
In 6.8: Absent ⚠️

Arch

In arm64: Absent ⚠️

In armhf: ✅

struct tegra_dfll {
    struct device *dev;
    struct tegra_dfll_soc_data *soc;
    void *base;
    void *i2c_base;
    void *i2c_controller_base;
    void *lut_base;
    struct regulator *vdd_reg;
    struct clk *soc_clk;
    struct clk *ref_clk;
    struct clk *i2c_clk;
    struct clk *dfll_clk;
    struct reset_control *dvco_rst;
    long unsigned int ref_rate;
    long unsigned int i2c_clk_rate;
    long unsigned int dvco_rate_min;
    enum dfll_ctrl_mode mode;
    enum dfll_tune_range tune_range;
    struct dentry *debugfs_dir;
    struct clk_hw dfll_clk_hw;
    const char *output_clock_name;
    struct dfll_rate_req last_req;
    long unsigned int last_unrounded_rate;
    u32 droop_ctrl;
    u32 sample_rate;
    u32 force_mode;
    u32 cf;
    u32 ci;
    u32 cg;
    bool cg_scale;
    u32 i2c_fs_rate;
    u32 i2c_reg;
    u32 i2c_slave_addr;
    unsigned int lut[33];
    long unsigned int lut_uv[33];
    int lut_size;
    u8 lut_bottom;
    u8 lut_min;
    u8 lut_max;
    u8 lut_safe;
    enum tegra_dfll_pmu_if pmu_if;
    long unsigned int pwm_rate;
    struct pinctrl *pwm_pin;
    struct pinctrl_state *pwm_enable_state;
    struct pinctrl_state *pwm_disable_state;
    u32 reg_init_uV;
};

In ppc64el: Absent ⚠️
In riscv64: Absent ⚠️

Flavor

In aws: Absent ⚠️
In azure: Absent ⚠️
In gcp: Absent ⚠️
In lowlatency: Absent ⚠️

Differences

Arch

website-struct

Struct: tegra_dfll

Status

Differences

Struct: `tegra_dfll`