sihRegular
4.4: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
4.8: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
4.10: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
4.13: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
4.15: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
4.18: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.0: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.3: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.4: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.8: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.11: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.13: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.15: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
5.19: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
6.2: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
6.5: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
6.8: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
arm64: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
armhf: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
ppc64el: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
riscv64: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
aws: Absent ⚠️
azure: Absent ⚠️
gcp: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
lowlatency: ✅struct sih {
char name[8];
u8 module;
u8 control_offset;
bool set_cor;
u8 bits;
u8 bytes_ixr;
u8 edr_offset;
u8 bytes_edr;
u8 irq_lines;
struct sih_irq_data mask[2];
};
Regular
4.4 and 4.8 ✅
4.8 and 4.10 ✅
4.10 and 4.13 ✅
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ✅
5.0 and 5.3 ✅
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ✅
5.15 and 5.19 ✅
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ✅
amd64 and arm64 ✅
amd64 and armhf ✅
amd64 and ppc64el ✅
amd64 and riscv64 ✅
generic and gcp ✅
generic and lowlatency ✅