pci_sriovRegular
4.4: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
struct mutex lock;
resource_size_t barsz[6];
};
4.8: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
struct mutex lock;
resource_size_t barsz[6];
};
4.10: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
struct mutex lock;
resource_size_t barsz[6];
};
4.13: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
4.15: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
4.18: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.0: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 cfg_size;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.3: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.4: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.8: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.11: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.13: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.15: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
5.19: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
6.2: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
6.5: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
6.8: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
arm64: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
armhf: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
ppc64el: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
riscv64: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
aws: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
azure: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
gcp: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
lowlatency: ✅struct pci_sriov {
int pos;
int nres;
u32 cap;
u16 ctrl;
u16 total_VFs;
u16 initial_VFs;
u16 num_VFs;
u16 offset;
u16 stride;
u16 vf_device;
u32 pgsz;
u8 link;
u8 max_VF_buses;
u16 driver_max_VFs;
struct pci_dev *dev;
struct pci_dev *self;
u32 class;
u8 hdr_type;
u16 subsystem_vendor;
u16 subsystem_device;
resource_size_t barsz[6];
bool drivers_autoprobe;
};
Regular
4.4 and 4.8 ✅
4.8 and 4.10 ✅
4.10 and 4.13 ⚠️bool drivers_autoprobe
struct mutex lock
4.13 and 4.15 ⚠️u16 vf_device
4.15 and 4.18 ⚠️u32 class
u8 hdr_type
u16 subsystem_vendor
u16 subsystem_device
4.18 and 5.0 ⚠️u32 cfg_size
5.0 and 5.3 ⚠️u32 cfg_size
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ✅
5.15 and 5.19 ✅
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ✅
amd64 and arm64 ✅
amd64 and armhf ✅
amd64 and ppc64el ✅
amd64 and riscv64 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅