msi_descRegular
4.4: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
};
4.8: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
const struct cpumask *affinity;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
};
4.10: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct cpumask *affinity;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
};
4.13: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct cpumask *affinity;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
};
4.15: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct cpumask *affinity;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
};
4.18: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct cpumask *affinity;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
};
5.0: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
};
5.3: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
5.4: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
5.8: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
5.11: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
5.13: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
5.15: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 msi_mask;
u32 msix_ctrl;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
5.19: ✅struct msi_desc {
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
struct device_attribute *sysfs_attrs;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u16 msi_index;
struct pci_msi_desc pci;
};
6.2: ✅struct msi_desc {
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
struct device_attribute *sysfs_attrs;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u16 msi_index;
struct pci_msi_desc pci;
struct msi_desc_data data;
};
6.5: ✅struct msi_desc {
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
struct device_attribute *sysfs_attrs;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u16 msi_index;
struct pci_msi_desc pci;
struct msi_desc_data data;
};
6.8: ✅struct msi_desc {
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
struct device_attribute *sysfs_attrs;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u16 msi_index;
struct pci_msi_desc pci;
struct msi_desc_data data;
};
arm64: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
const void *iommu_cookie;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
armhf: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
ppc64el: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
riscv64: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
aws: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
azure: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
gcp: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
lowlatency: ✅struct msi_desc {
struct list_head list;
unsigned int irq;
unsigned int nvec_used;
struct device *dev;
struct msi_msg msg;
struct irq_affinity_desc *affinity;
void (*write_msi_msg)(struct msi_desc *, void *);
void *write_msi_msg_data;
u32 masked;
struct (anon) msi_attrib;
u8 mask_pos;
void *mask_base;
struct platform_msi_desc platform;
struct fsl_mc_msi_desc fsl_mc;
struct ti_sci_inta_msi_desc inta;
};
Regular
4.4 and 4.8 ⚠️const struct cpumask *affinity
struct fsl_mc_msi_desc fsl_mc
4.8 and 4.10 ⚠️const struct cpumask *affinity ➡️ struct cpumask *affinity
4.10 and 4.13 ✅
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ⚠️struct cpumask *affinity ➡️ struct irq_affinity_desc *affinity
5.0 and 5.3 ⚠️void (*write_msi_msg)(struct msi_desc *, void *)
void *write_msi_msg_data
struct ti_sci_inta_msi_desc inta
5.3 and 5.4 ✅
5.4 and 5.8 ⚠️const void *iommu_cookie
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ⚠️u32 msi_mask
u32 msix_ctrl
u32 masked
5.15 and 5.19 ⚠️struct device_attribute *sysfs_attrs
u16 msi_index
struct pci_msi_desc pci
struct list_head list
u32 msi_mask
u32 msix_ctrl
struct (anon) msi_attrib
u8 mask_pos
void *mask_base
struct platform_msi_desc platform
struct fsl_mc_msi_desc fsl_mc
struct ti_sci_inta_msi_desc inta
5.19 and 6.2 ⚠️struct msi_desc_data data
6.2 and 6.5 ✅
6.5 and 6.8 ✅
amd64 and arm64 ⚠️const void *iommu_cookie
amd64 and armhf ✅
amd64 and ppc64el ✅
amd64 and riscv64 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅