website-struct

Struct: dwc2_qh

Status

Regular

• In 4.4: ✅

  struct dwc2_qh {
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 usecs;
      u16 interval;
      u16 sched_frame;
      u16 frame_usecs[8];
      u16 start_split_frame;
      u16 ntd;
      u8 *dw_align_buf;
      int dw_align_buf_size;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_hcd_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 *n_bytes;
      unsigned int tt_buffer_dirty;
  };
  

• In 4.8: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_hcd_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
  };
  

• In 4.10: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
  };
  

• In 4.13: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
  };
  

• In 4.15: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
  };
  

• In 4.18: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct timer_list wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.0: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.3: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.4: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.8: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.11: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.13: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.15: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 5.19: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 6.2: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 6.5: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In 6.8: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

Arch

• In arm64: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In armhf: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In ppc64el: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In riscv64: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

Flavor

• In aws: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In azure: Absent ⚠️
• In gcp: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

• In lowlatency: ✅

  struct dwc2_qh {
      struct dwc2_hsotg *hsotg;
      u8 ep_type;
      u8 ep_is_in;
      u16 maxp;
      u16 maxp_mult;
      u8 dev_speed;
      u8 data_toggle;
      u8 ping_state;
      u8 do_split;
      u8 td_first;
      u8 td_last;
      u16 host_us;
      u16 device_us;
      u16 host_interval;
      u16 device_interval;
      u16 next_active_frame;
      u16 start_active_frame;
      s16 num_hs_transfers;
      struct dwc2_hs_transfer_time hs_transfers[8];
      u32 ls_start_schedule_slice;
      u16 ntd;
      u8 *dw_align_buf;
      dma_addr_t dw_align_buf_dma;
      struct list_head qtd_list;
      struct dwc2_host_chan *channel;
      struct list_head qh_list_entry;
      struct dwc2_dma_desc *desc_list;
      dma_addr_t desc_list_dma;
      u32 desc_list_sz;
      u32 *n_bytes;
      struct timer_list unreserve_timer;
      struct hrtimer wait_timer;
      struct dwc2_tt *dwc_tt;
      int ttport;
      unsigned int tt_buffer_dirty;
      unsigned int unreserve_pending;
      unsigned int schedule_low_speed;
      unsigned int want_wait;
      unsigned int wait_timer_cancel;
  };
  

Differences

Regular

• Changed between 4.4 and 4.8 ⚠️

  • Field added. struct dwc2_hsotg *hsotg
  • Field added. u16 host_us
  • Field added. u16 device_us
  • Field added. u16 host_interval
  • Field added. u16 device_interval
  • Field added. u16 next_active_frame
  • Field added. u16 start_active_frame
  • Field added. s16 num_hs_transfers
  • Field added. struct dwc2_hs_transfer_time hs_transfers[8]
  • Field added. u32 ls_start_schedule_slice
  • Field added. u32 desc_list_sz
  • Field added. struct timer_list unreserve_timer
  • Field added. struct dwc2_tt *dwc_tt
  • Field added. int ttport
  • Field added. unsigned int unreserve_pending
  • Field added. unsigned int schedule_low_speed
  • Field removed. u16 usecs
  • Field removed. u16 interval
  • Field removed. u16 sched_frame
  • Field removed. u16 frame_usecs[8]
  • Field removed. u16 start_split_frame
  • Field removed. u8 *dw_align_buf
  • Field removed. int dw_align_buf_size
  • Field removed. dma_addr_t dw_align_buf_dma
• Changed between 4.8 and 4.10 ⚠️

  • Field type changed. struct dwc2_hcd_dma_desc *desc_list ➡️ struct dwc2_dma_desc *desc_list
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• Changed between 4.15 and 4.18 ⚠️

  • Field added. u8 *dw_align_buf
  • Field added. dma_addr_t dw_align_buf_dma
  • Field added. struct timer_list wait_timer
  • Field added. unsigned int want_wait
  • Field added. unsigned int wait_timer_cancel
• Changed between 4.18 and 5.0 ⚠️

  • Field type changed. struct timer_list wait_timer ➡️ struct hrtimer wait_timer
• Changed between 5.0 and 5.3 ⚠️

  • Field added. u16 maxp_mult
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

• No changes between amd64 and arm64 ✅
• No changes between amd64 and armhf ✅
• No changes between amd64 and ppc64el ✅
• No changes between amd64 and riscv64 ✅

Flavor

• No changes between generic and aws ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅