website-struct

Struct: dwc2_hw_params

Status

Regular

• In 4.4: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int host_rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int utmi_phy_data_width;
      u32 snpsid;
  };
  

• In 4.8: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int dma_desc_fs_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int host_rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int utmi_phy_data_width;
      u32 snpsid;
      u32 dev_ep_dirs;
  };
  

• In 4.10: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int utmi_phy_data_width;
      u32 snpsid;
      u32 dev_ep_dirs;
  };
  

• In 4.13: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int utmi_phy_data_width;
      u32 snpsid;
      u32 dev_ep_dirs;
  };
  

• In 4.15: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int utmi_phy_data_width;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 4.18: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.0: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.3: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.4: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.8: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.11: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.13: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.15: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 5.19: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 6.2: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 6.5: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In 6.8: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

Arch

• In arm64: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In armhf: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In ppc64el: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In riscv64: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

Flavor

• In aws: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In azure: Absent ⚠️
• In gcp: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

• In lowlatency: ✅

  struct dwc2_hw_params {
      unsigned int op_mode;
      unsigned int arch;
      unsigned int dma_desc_enable;
      unsigned int enable_dynamic_fifo;
      unsigned int en_multiple_tx_fifo;
      unsigned int rx_fifo_size;
      unsigned int host_nperio_tx_fifo_size;
      unsigned int dev_nperio_tx_fifo_size;
      unsigned int host_perio_tx_fifo_size;
      unsigned int nperio_tx_q_depth;
      unsigned int host_perio_tx_q_depth;
      unsigned int dev_token_q_depth;
      unsigned int max_transfer_size;
      unsigned int max_packet_count;
      unsigned int host_channels;
      unsigned int hs_phy_type;
      unsigned int fs_phy_type;
      unsigned int i2c_enable;
      unsigned int acg_enable;
      unsigned int num_dev_ep;
      unsigned int num_dev_in_eps;
      unsigned int num_dev_perio_in_ep;
      unsigned int total_fifo_size;
      unsigned int power_optimized;
      unsigned int hibernation;
      unsigned int utmi_phy_data_width;
      unsigned int lpm_mode;
      unsigned int ipg_isoc_en;
      unsigned int service_interval_mode;
      u32 snpsid;
      u32 dev_ep_dirs;
      u32 g_tx_fifo_size[16];
  };
  

Differences

Regular

• Changed between 4.4 and 4.8 ⚠️

  • Field added. unsigned int dma_desc_fs_enable
  • Field added. unsigned int dev_nperio_tx_fifo_size
  • Field added. u32 dev_ep_dirs
• Changed between 4.8 and 4.10 ⚠️

  • Field added. unsigned int rx_fifo_size
  • Field removed. unsigned int dma_desc_fs_enable
  • Field removed. unsigned int host_rx_fifo_size
• No changes between 4.10 and 4.13 ✅
• Changed between 4.13 and 4.15 ⚠️

  • Field added. unsigned int num_dev_in_eps
  • Field added. u32 g_tx_fifo_size[16]
• Changed between 4.15 and 4.18 ⚠️

  • Field added. unsigned int acg_enable
  • Field added. unsigned int hibernation
  • Field added. unsigned int lpm_mode
  • Field added. unsigned int ipg_isoc_en
• Changed between 4.18 and 5.0 ⚠️

  • Field added. unsigned int service_interval_mode
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

• No changes between amd64 and arm64 ✅
• No changes between amd64 and armhf ✅
• No changes between amd64 and ppc64el ✅
• No changes between amd64 and riscv64 ✅

Flavor

• No changes between generic and aws ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅