drm_display_infoRegular
4.4: Absent ⚠️
4.8: Absent ⚠️
4.10: Absent ⚠️
4.13: Absent ⚠️
4.15: Absent ⚠️
4.18: Absent ⚠️
5.0: Absent ⚠️
5.3: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
5.4: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
5.8: Absent ⚠️
5.11: Absent ⚠️
5.13: Absent ⚠️
5.15: Absent ⚠️
5.19: Absent ⚠️
6.2: Absent ⚠️
6.5: Absent ⚠️
6.8: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool is_hdmi;
bool has_audio;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_rgb444_dc_modes;
u8 edid_hdmi_ycbcr444_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
struct drm_monitor_range_info monitor_range;
struct drm_luminance_range_info luminance_range;
u8 mso_stream_count;
u8 mso_pixel_overlap;
u32 max_dsc_bpp;
u8 *vics;
int vics_len;
u32 quirks;
u16 source_physical_address;
};
arm64: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
armhf: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
ppc64el: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
riscv64: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
aws: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
azure: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
gcp: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
lowlatency: ✅struct drm_display_info {
unsigned int width_mm;
unsigned int height_mm;
unsigned int bpc;
enum subpixel_order subpixel_order;
int panel_orientation;
u32 color_formats;
const u32 *bus_formats;
unsigned int num_bus_formats;
u32 bus_flags;
int max_tmds_clock;
bool dvi_dual;
bool has_hdmi_infoframe;
bool rgb_quant_range_selectable;
u8 edid_hdmi_dc_modes;
u8 cea_rev;
struct drm_hdmi_info hdmi;
bool non_desktop;
};
Regular
5.3 and 5.4 ✅
amd64 and arm64 ✅
amd64 and armhf ✅
amd64 and ppc64el ✅
amd64 and riscv64 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅