devlink_port_attrsRegular
4.4: Absent ⚠️
4.8: Absent ⚠️
4.10: Absent ⚠️
4.13: Absent ⚠️
4.15: Absent ⚠️
4.18: ✅struct devlink_port_attrs {
bool set;
enum devlink_port_flavour flavour;
u32 port_number;
bool split;
u32 split_subport_number;
};
5.0: ✅struct devlink_port_attrs {
bool set;
enum devlink_port_flavour flavour;
u32 port_number;
bool split;
u32 split_subport_number;
};
5.3: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
5.4: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
5.8: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
5.11: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
5.13: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
struct devlink_port_pci_sf_attrs pci_sf;
};
5.15: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
struct devlink_port_pci_sf_attrs pci_sf;
};
5.19: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
struct devlink_port_pci_sf_attrs pci_sf;
};
6.2: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
struct devlink_port_pci_sf_attrs pci_sf;
};
6.5: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
struct devlink_port_pci_sf_attrs pci_sf;
};
6.8: ✅struct devlink_port_attrs {
u8 split;
u8 splittable;
u32 lanes;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
struct devlink_port_pci_sf_attrs pci_sf;
};
arm64: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
armhf: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
ppc64el: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
riscv64: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
aws: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
azure: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
gcp: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
lowlatency: ✅struct devlink_port_attrs {
u8 set;
u8 split;
u8 switch_port;
enum devlink_port_flavour flavour;
struct netdev_phys_item_id switch_id;
struct devlink_port_phys_attrs phys;
struct devlink_port_pci_pf_attrs pci_pf;
struct devlink_port_pci_vf_attrs pci_vf;
};
Regular
4.18 and 5.0 ✅
5.0 and 5.3 ⚠️u8 switch_port
struct netdev_phys_item_id switch_id
struct devlink_port_phys_attrs phys
struct devlink_port_pci_pf_attrs pci_pf
struct devlink_port_pci_vf_attrs pci_vf
u32 port_number
u32 split_subport_number
bool set ➡️ u8 set
bool split ➡️ u8 split
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ⚠️u8 splittable
u32 lanes
u8 set
u8 switch_port
5.11 and 5.13 ⚠️struct devlink_port_pci_sf_attrs pci_sf
5.13 and 5.15 ✅
5.15 and 5.19 ✅
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ✅
amd64 and arm64 ✅
amd64 and armhf ✅
amd64 and ppc64el ✅
amd64 and riscv64 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅