cper_sec_pcieRegular
4.4: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
4.8: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
4.10: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
4.13: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
4.15: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
4.18: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
5.0: ✅struct cper_sec_pcie {
__u64 validation_bits;
__u32 port_type;
struct (anon) version;
__u16 command;
__u16 status;
__u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
__u8 capability[60];
__u8 aer_info[96];
};
5.3: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
5.4: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
5.8: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
5.11: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
5.13: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
5.15: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
5.19: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
6.2: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
6.5: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
6.8: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
arm64: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
armhf: Absent ⚠️
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Absent ⚠️
azure: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
gcp: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
lowlatency: ✅struct cper_sec_pcie {
u64 validation_bits;
u32 port_type;
struct (anon) version;
u16 command;
u16 status;
u32 reserved;
struct (anon) device_id;
struct (anon) serial_number;
struct (anon) bridge;
u8 capability[60];
u8 aer_info[96];
};
Regular
4.4 and 4.8 ✅
4.8 and 4.10 ✅
4.10 and 4.13 ✅
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ✅
5.0 and 5.3 ⚠️__u64 validation_bits ➡️ u64 validation_bits
__u32 port_type ➡️ u32 port_type
__u16 command ➡️ u16 command
__u16 status ➡️ u16 status
__u32 reserved ➡️ u32 reserved
__u8 capability[60] ➡️ u8 capability[60]
__u8 aer_info[96] ➡️ u8 aer_info[96]
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ✅
5.15 and 5.19 ✅
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ✅
amd64 and arm64 ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅