clk_sccg_pll_setupRegular
4.4: Absent ⚠️
4.8: Absent ⚠️
4.10: Absent ⚠️
4.13: Absent ⚠️
4.15: Absent ⚠️
4.18: Absent ⚠️
5.0: Absent ⚠️
5.3: Absent ⚠️
5.4: Absent ⚠️
5.8: Absent ⚠️
5.11: Absent ⚠️
5.13: Absent ⚠️
5.15: Absent ⚠️
5.19: Absent ⚠️
6.2: Absent ⚠️
6.5: Absent ⚠️
6.8: Absent ⚠️
arm64: ✅struct clk_sccg_pll_setup {
int divr1;
int divf1;
int divr2;
int divf2;
int divq;
int bypass;
uint64_t vco1;
uint64_t vco2;
uint64_t fout;
uint64_t ref;
uint64_t ref_div1;
uint64_t ref_div2;
uint64_t fout_request;
int fout_error;
};
armhf: ✅struct clk_sccg_pll_setup {
int divr1;
int divf1;
int divr2;
int divf2;
int divq;
int bypass;
uint64_t vco1;
uint64_t vco2;
uint64_t fout;
uint64_t ref;
uint64_t ref_div1;
uint64_t ref_div2;
uint64_t fout_request;
int fout_error;
};
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Absent ⚠️
azure: Absent ⚠️
gcp: Absent ⚠️
lowlatency: Absent ⚠️
Arch