armada_thermal_dataRegular
4.4: Absent ⚠️
4.8: Absent ⚠️
4.10: Absent ⚠️
4.13: Absent ⚠️
4.15: Absent ⚠️
4.18: Absent ⚠️
5.0: Absent ⚠️
5.3: Absent ⚠️
5.4: Absent ⚠️
5.8: Absent ⚠️
5.11: Absent ⚠️
5.13: Absent ⚠️
5.15: Absent ⚠️
5.19: Absent ⚠️
6.2: Absent ⚠️
6.5: Absent ⚠️
6.8: Absent ⚠️
arm64: ✅struct armada_thermal_data {
void (*init)(struct platform_device *, struct armada_thermal_priv *);
s64 coef_b;
s64 coef_m;
u32 coef_div;
bool inverted;
bool signed_sample;
unsigned int temp_shift;
unsigned int temp_mask;
unsigned int thresh_shift;
unsigned int hyst_shift;
unsigned int hyst_mask;
u32 is_valid_bit;
unsigned int syscon_control0_off;
unsigned int syscon_control1_off;
unsigned int syscon_status_off;
unsigned int dfx_irq_cause_off;
unsigned int dfx_irq_mask_off;
unsigned int dfx_overheat_irq;
unsigned int dfx_server_irq_mask_off;
unsigned int dfx_server_irq_en;
unsigned int cpu_nr;
};
armhf: ✅struct armada_thermal_data {
void (*init)(struct platform_device *, struct armada_thermal_priv *);
s64 coef_b;
s64 coef_m;
u32 coef_div;
bool inverted;
bool signed_sample;
unsigned int temp_shift;
unsigned int temp_mask;
unsigned int thresh_shift;
unsigned int hyst_shift;
unsigned int hyst_mask;
u32 is_valid_bit;
unsigned int syscon_control0_off;
unsigned int syscon_control1_off;
unsigned int syscon_status_off;
unsigned int dfx_irq_cause_off;
unsigned int dfx_irq_mask_off;
unsigned int dfx_overheat_irq;
unsigned int dfx_server_irq_mask_off;
unsigned int dfx_server_irq_en;
unsigned int cpu_nr;
};
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Absent ⚠️
azure: Absent ⚠️
gcp: Absent ⚠️
lowlatency: Absent ⚠️
Arch