amd_uncoreRegular
4.4: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[4];
struct amd_uncore *free_when_cpu_online;
};
4.8: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[4];
struct hlist_node node;
};
4.10: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[4];
struct hlist_node node;
};
4.13: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
4.15: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
4.18: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.0: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.3: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.4: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.8: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.11: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.13: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
5.15: Absent ⚠️
5.19: Absent ⚠️
6.2: Absent ⚠️
6.5: Absent ⚠️
6.8: Absent ⚠️
arm64: Absent ⚠️
armhf: Absent ⚠️
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
azure: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
gcp: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
lowlatency: ✅struct amd_uncore {
int id;
int refcnt;
int cpu;
int num_counters;
int rdpmc_base;
u32 msr_base;
cpumask_t *active_mask;
struct pmu *pmu;
struct perf_event * events[6];
struct hlist_node node;
};
Regular
4.4 and 4.8 ⚠️struct hlist_node node
struct amd_uncore *free_when_cpu_online
4.8 and 4.10 ✅
4.10 and 4.13 ⚠️struct perf_event * events[4] ➡️ struct perf_event * events[6]
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ✅
5.0 and 5.3 ✅
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅