test_intelRegular
4.4: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff81009c50)
Location: arch/x86/events/msr.c:18
Inline: True
Symbols:
ffffffff81009c50-ffffffff81009c96: test_intel (STB_LOCAL)
4.8: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff81009ef0)
Location: arch/x86/events/msr.c:31
Inline: True
Symbols:
ffffffff81009ef0-ffffffff81009f36: test_intel (STB_LOCAL)
4.10: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff81009f30)
Location: arch/x86/events/msr.c:31
Inline: True
Symbols:
ffffffff81009f30-ffffffff81009f76: test_intel (STB_LOCAL)
4.13: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100a3e0)
Location: arch/x86/events/msr.c:31
Inline: True
Symbols:
ffffffff8100a3e0-ffffffff8100a426: test_intel (STB_LOCAL)
4.15: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100a8c0)
Location: arch/x86/events/msr.c:32
Inline: True
Symbols:
ffffffff8100a8c0-ffffffff8100a90c: test_intel (STB_LOCAL)
4.18: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100aff0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100aff0-ffffffff8100b03a: test_intel (STB_LOCAL)
5.0: Selective Inline ⚠️bool test_intel(int idx);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100af20)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100af20-ffffffff8100afe3: test_intel (STB_LOCAL)
5.3: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100b410)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100b410-ffffffff8100b4b8: test_intel (STB_LOCAL)
5.4: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100b820)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100b820-ffffffff8100b8cb: test_intel (STB_LOCAL)
5.8: Selective Inline, Transformation ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/msr.c (ffffffff8100cb10)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100cb10-ffffffff8100cbab: test_intel.part.0 (STB_LOCAL)
ffffffff8100cbb0-ffffffff8100cbcd: test_intel (STB_LOCAL)
5.11: Selective Inline, Transformation ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/msr.c (ffffffff8100ba60)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100ba60-ffffffff8100bafb: test_intel.part.0 (STB_LOCAL)
ffffffff8100bb00-ffffffff8100bb1d: test_intel (STB_LOCAL)
5.13: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100c400)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100c400-ffffffff8100c4ab: test_intel (STB_LOCAL)
5.15: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100c930)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100c930-ffffffff8100c9db: test_intel (STB_LOCAL)
5.19: Selective Inline, Transformation ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/msr.c (ffffffff8100d6a0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100d6a0-ffffffff8100d769: test_intel.part.0 (STB_LOCAL)
ffffffff8100d770-ffffffff8100d799: test_intel (STB_LOCAL)
6.2: Selective Inline, Transformation ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/msr.c (ffffffff810108a0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff810108a0-ffffffff81010975: test_intel.part.0 (STB_LOCAL)
ffffffff81010990-ffffffff810109b9: test_intel (STB_LOCAL)
6.5: Selective Inline, Transformation ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/msr.c (ffffffff8100ff60)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100ff60-ffffffff81010033: test_intel.part.0 (STB_LOCAL)
ffffffff81010050-ffffffff81010079: test_intel (STB_LOCAL)
6.8: Selective Inline, Transformation ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/msr.c (ffffffff810156a0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff810156a0-ffffffff81015773: test_intel.part.0 (STB_LOCAL)
ffffffff81015790-ffffffff810157b9: test_intel (STB_LOCAL)
arm64: Absent ⚠️
armhf: Absent ⚠️
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100b820)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100b820-ffffffff8100b8cb: test_intel (STB_LOCAL)
azure: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100a1b0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100a1b0-ffffffff8100a25b: test_intel (STB_LOCAL)
gcp: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100b7e0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100b7e0-ffffffff8100b88b: test_intel (STB_LOCAL)
lowlatency: Selective Inline ⚠️bool test_intel(int idx, void *data);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/msr.c (ffffffff8100b9c0)
Location: arch/x86/events/msr.c:40
Inline: True
Symbols:
ffffffff8100b9c0-ffffffff8100ba6b: test_intel (STB_LOCAL)
Regular
4.4 and 4.8 ✅
4.8 and 4.10 ✅
4.10 and 4.13 ✅
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ✅
5.0 and 5.3 ⚠️void *data
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ✅
5.15 and 5.19 ✅
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅