website-function

Function: task_context_opt

Status

Regular

• In 4.4: Absent ⚠️
• In 4.8: Absent ⚠️
• In 4.10: Absent ⚠️
• In 4.13: Absent ⚠️
• In 4.15: Absent ⚠️
• In 4.18: Absent ⚠️
• In 5.0: Absent ⚠️
• In 5.3: Absent ⚠️
• In 5.4: Absent ⚠️
• In 5.8: Absent ⚠️
• In 5.11: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81014b44)
  Location: arch/x86/events/perf_event.h:903
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

• In 5.13: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81015d04)
  Location: arch/x86/events/perf_event.h:1023
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

• In 5.15: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81017374)
  Location: arch/x86/events/perf_event.h:1023
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

• In 5.19: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810196f2)
  Location: arch/x86/events/perf_event.h:1044
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

• In 6.2: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101d69c)
  Location: arch/x86/events/perf_event.h:1051
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

• In 6.5: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101d398)
  Location: arch/x86/events/perf_event.h:1056
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

• In 6.8: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81023355)
  Location: arch/x86/events/perf_event.h:1071
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_swap_task_ctx
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_save
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Absent ⚠️
• In azure: Absent ⚠️
• In gcp: Absent ⚠️
• In lowlatency: Absent ⚠️

Differences