nhm_uncore_msr_enable_eventRegular
4.4: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff810191e0)
Location: arch/x86/events/intel/uncore_snb.c:626
Inline: True
Symbols:
ffffffff810191e0-ffffffff8101920c: nhm_uncore_msr_enable_event.part.3 (STB_LOCAL)
ffffffff81019250-ffffffff81019281: nhm_uncore_msr_enable_event (STB_LOCAL)
4.8: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff810185a0)
Location: arch/x86/events/intel/uncore_snb.c:739
Inline: True
Symbols:
ffffffff810185a0-ffffffff810185cc: nhm_uncore_msr_enable_event.part.8 (STB_LOCAL)
ffffffff81018610-ffffffff81018642: nhm_uncore_msr_enable_event (STB_LOCAL)
4.10: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81018770)
Location: arch/x86/events/intel/uncore_snb.c:753
Inline: True
Symbols:
ffffffff81018770-ffffffff8101879c: nhm_uncore_msr_enable_event.part.10 (STB_LOCAL)
ffffffff810187e0-ffffffff81018812: nhm_uncore_msr_enable_event (STB_LOCAL)
4.13: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81016cd0)
Location: arch/x86/events/intel/uncore_snb.c:753
Inline: True
Symbols:
ffffffff81016b80-ffffffff81016bac: nhm_uncore_msr_enable_event.part.9 (STB_LOCAL)
ffffffff81016cd0-ffffffff81016d02: nhm_uncore_msr_enable_event (STB_LOCAL)
4.15: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81017550)
Location: arch/x86/events/intel/uncore_snb.c:754
Inline: True
Symbols:
ffffffff81017400-ffffffff8101742c: nhm_uncore_msr_enable_event.part.9 (STB_LOCAL)
ffffffff81017550-ffffffff81017582: nhm_uncore_msr_enable_event (STB_LOCAL)
4.18: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81017ef0)
Location: arch/x86/events/intel/uncore_snb.c:691
Inline: True
Symbols:
ffffffff81017dc0-ffffffff81017deb: nhm_uncore_msr_enable_event.part.6 (STB_LOCAL)
ffffffff81017ef0-ffffffff81017f22: nhm_uncore_msr_enable_event (STB_LOCAL)
5.0: Selective Inline, Transformation ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: True
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff810186c0)
Location: arch/x86/events/intel/uncore_snb.c:810
Inline: True
Symbols:
ffffffff810185c0-ffffffff810185eb: nhm_uncore_msr_enable_event.part.6 (STB_LOCAL)
ffffffff810186c0-ffffffff810186f2: nhm_uncore_msr_enable_event (STB_LOCAL)
5.3: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81019c10)
Location: arch/x86/events/intel/uncore_snb.c:927
Inline: True
Symbols:
ffffffff81019c10-ffffffff81019c54: nhm_uncore_msr_enable_event (STB_LOCAL)
5.4: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101a590)
Location: arch/x86/events/intel/uncore_snb.c:933
Inline: True
Symbols:
ffffffff8101a590-ffffffff8101a5d4: nhm_uncore_msr_enable_event (STB_LOCAL)
5.8: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101c020)
Location: arch/x86/events/intel/uncore_snb.c:938
Inline: True
Symbols:
ffffffff8101c020-ffffffff8101c064: nhm_uncore_msr_enable_event (STB_LOCAL)
5.11: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101c560)
Location: arch/x86/events/intel/uncore_snb.c:1110
Inline: True
Symbols:
ffffffff8101c560-ffffffff8101c5a4: nhm_uncore_msr_enable_event (STB_LOCAL)
5.13: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101d9e0)
Location: arch/x86/events/intel/uncore_snb.c:1233
Inline: True
Symbols:
ffffffff8101d9e0-ffffffff8101da24: nhm_uncore_msr_enable_event (STB_LOCAL)
5.15: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81020ae0)
Location: arch/x86/events/intel/uncore_snb.c:1233
Inline: True
Symbols:
ffffffff81020ae0-ffffffff81020b24: nhm_uncore_msr_enable_event (STB_LOCAL)
5.19: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81023fd0)
Location: arch/x86/events/intel/uncore_snb.c:1140
Inline: True
Symbols:
ffffffff81023fd0-ffffffff81024046: nhm_uncore_msr_enable_event (STB_LOCAL)
6.2: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81028f90)
Location: arch/x86/events/intel/uncore_snb.c:1288
Inline: True
Symbols:
ffffffff81028f90-ffffffff81029006: nhm_uncore_msr_enable_event (STB_LOCAL)
6.5: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81028fc0)
Location: arch/x86/events/intel/uncore_snb.c:1288
Inline: True
Symbols:
ffffffff81028fc0-ffffffff81029036: nhm_uncore_msr_enable_event (STB_LOCAL)
6.8: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8102f120)
Location: arch/x86/events/intel/uncore_snb.c:1288
Inline: True
Symbols:
ffffffff8102f120-ffffffff8102f196: nhm_uncore_msr_enable_event (STB_LOCAL)
arm64: Absent ⚠️
armhf: Absent ⚠️
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101a590)
Location: arch/x86/events/intel/uncore_snb.c:933
Inline: True
Symbols:
ffffffff8101a590-ffffffff8101a5d4: nhm_uncore_msr_enable_event (STB_LOCAL)
azure: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff81019c90)
Location: arch/x86/events/intel/uncore_snb.c:933
Inline: True
Symbols:
ffffffff81019c90-ffffffff81019cf4: nhm_uncore_msr_enable_event (STB_LOCAL)
gcp: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101a550)
Location: arch/x86/events/intel/uncore_snb.c:933
Inline: True
Symbols:
ffffffff8101a550-ffffffff8101a594: nhm_uncore_msr_enable_event (STB_LOCAL)
lowlatency: Selective Inline ⚠️void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/events/intel/uncore_snb.c (ffffffff8101a7e0)
Location: arch/x86/events/intel/uncore_snb.c:933
Inline: True
Symbols:
ffffffff8101a7e0-ffffffff8101a824: nhm_uncore_msr_enable_event (STB_LOCAL)
Regular
4.4 and 4.8 ✅
4.8 and 4.10 ✅
4.10 and 4.13 ✅
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ✅
5.0 and 5.3 ✅
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ✅
5.15 and 5.19 ✅
5.19 and 6.2 ✅
6.2 and 6.5 ✅
6.5 and 6.8 ✅
generic and aws ✅
generic and azure ✅
generic and gcp ✅
generic and lowlatency ✅