is_intel_pmu_msrRegular
4.4: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81025e50)
Location: arch/x86/xen/pmu.c:135
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_read
- arch/x86/xen/pmu.c:pmu_msr_write
Symbols:
ffffffff81025e50-ffffffff81025f2a: is_intel_pmu_msr (STB_LOCAL)
4.8: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81025250)
Location: arch/x86/xen/pmu.c:135
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff81025250-ffffffff8102532a: is_intel_pmu_msr (STB_LOCAL)
4.10: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81025970)
Location: arch/x86/xen/pmu.c:135
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff81025970-ffffffff81025a4a: is_intel_pmu_msr (STB_LOCAL)
4.13: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101c310)
Location: arch/x86/xen/pmu.c:135
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101c310-ffffffff8101c3ea: is_intel_pmu_msr (STB_LOCAL)
4.15: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101cf90)
Location: arch/x86/xen/pmu.c:136
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101cf90-ffffffff8101d06a: is_intel_pmu_msr (STB_LOCAL)
4.18: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101d9a0)
Location: arch/x86/xen/pmu.c:136
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101d9a0-ffffffff8101da7a: is_intel_pmu_msr (STB_LOCAL)
5.0: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101d230)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101d230-ffffffff8101d30a: is_intel_pmu_msr (STB_LOCAL)
5.3: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101eda0)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101eda0-ffffffff8101ee74: is_intel_pmu_msr (STB_LOCAL)
5.4: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101f700)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101f700-ffffffff8101f7d4: is_intel_pmu_msr (STB_LOCAL)
5.8: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81021d10)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff81021d10-ffffffff81021de4: is_intel_pmu_msr (STB_LOCAL)
5.11: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff810223f0)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff810223f0-ffffffff810224c4: is_intel_pmu_msr (STB_LOCAL)
5.13: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81024780)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff81024780-ffffffff81024854: is_intel_pmu_msr (STB_LOCAL)
5.15: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81028b80)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff81028b80-ffffffff81028c54: is_intel_pmu_msr (STB_LOCAL)
5.19: ✅int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8102d0a0)
Location: arch/x86/xen/pmu.c:143
Inline: False
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8102d0a0-ffffffff8102d194: is_intel_pmu_msr (STB_LOCAL)
6.2: Full Inline ⚠️Collision: Unique Static
Inline: Full
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81034681)
Location: arch/x86/xen/pmu.c:147
Inline: True
Inline callers:
- arch/x86/xen/pmu.c:pmu_msr_chk_emulated
6.5: Full Inline ⚠️Collision: Unique Static
Inline: Full
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff81034611)
Location: arch/x86/xen/pmu.c:147
Inline: True
Inline callers:
- arch/x86/xen/pmu.c:pmu_msr_chk_emulated
6.8: Full Inline ⚠️Collision: Unique Static
Inline: Full
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8103a811)
Location: arch/x86/xen/pmu.c:147
Inline: True
Inline callers:
- arch/x86/xen/pmu.c:pmu_msr_chk_emulated
arm64: Absent ⚠️
armhf: Absent ⚠️
ppc64el: Absent ⚠️
riscv64: Absent ⚠️
aws: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101f860)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101f860-ffffffff8101f934: is_intel_pmu_msr (STB_LOCAL)
azure: Absent ⚠️
gcp: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101f6c0)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101f6c0-ffffffff8101f794: is_intel_pmu_msr (STB_LOCAL)
lowlatency: Selective Inline ⚠️int is_intel_pmu_msr(u32 msr_index, int *type, int *index);
Collision: Unique Static
Inline: Selective
Transformation: False
Instances:
In arch/x86/xen/pmu.c (ffffffff8101f910)
Location: arch/x86/xen/pmu.c:143
Inline: True
Direct callers:
- arch/x86/xen/pmu.c:pmu_msr_write
- arch/x86/xen/pmu.c:pmu_msr_read
Symbols:
ffffffff8101f910-ffffffff8101f9e4: is_intel_pmu_msr (STB_LOCAL)
Regular
4.4 and 4.8 ✅
4.8 and 4.10 ✅
4.10 and 4.13 ✅
4.13 and 4.15 ✅
4.15 and 4.18 ✅
4.18 and 5.0 ✅
5.0 and 5.3 ✅
5.3 and 5.4 ✅
5.4 and 5.8 ✅
5.8 and 5.11 ✅
5.11 and 5.13 ✅
5.13 and 5.15 ✅
5.15 and 5.19 ✅
generic and aws ✅
generic and gcp ✅
generic and lowlatency ✅