DepSurf

Struct: sx150x_device_data

Status

Regular

• In 4.4: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
  };
  

• In 4.8: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
  };
  

• In 4.10: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 4.13: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 4.15: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 4.18: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.0: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.3: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.4: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.8: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.11: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.13: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.15: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 5.19: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 6.2: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 6.5: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In 6.8: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

Arch

• In arm64: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In armhf: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In ppc64el: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In riscv64: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

Flavor

• In aws: Absent ⚠️
• In azure: Absent ⚠️
• In gcp: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

• In lowlatency: ✅

  struct sx150x_device_data {
      u8 model;
      u8 reg_pullup;
      u8 reg_pulldn;
      u8 reg_dir;
      u8 reg_data;
      u8 reg_irq_mask;
      u8 reg_irq_src;
      u8 reg_sense;
      u8 ngpios;
      union (anon) pri;
      const struct pinctrl_pin_desc *pins;
      unsigned int npins;
  };
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• Changed between 4.8 and 4.10 ⚠️

  • Field added. const struct pinctrl_pin_desc *pins
  • Field added. unsigned int npins
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

• No changes between amd64 and arm64 ✅
• No changes between amd64 and armhf ✅
• No changes between amd64 and ppc64el ✅
• No changes between amd64 and riscv64 ✅

Flavor

• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅