DepSurf

Struct: `perf_amd_iommu`

Status

Regular

In 4.4: ✅

struct perf_amd_iommu {
    struct pmu pmu;
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
    const struct attribute_group * attr_groups[4];
};

In 4.8: ✅

struct perf_amd_iommu {
    struct pmu pmu;
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
    const struct attribute_group * attr_groups[4];
};

In 4.10: ✅

struct perf_amd_iommu {
    struct pmu pmu;
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
    const struct attribute_group * attr_groups[4];
};

In 4.13: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 4.15: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 4.18: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.0: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.3: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.4: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.8: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.11: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.13: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.15: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 5.19: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 6.2: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 6.5: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In 6.8: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

Arch

In arm64: Absent ⚠️
In armhf: Absent ⚠️
In ppc64el: Absent ⚠️
In riscv64: Absent ⚠️

Flavor

In aws: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In azure: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In gcp: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

In lowlatency: ✅

struct perf_amd_iommu {
    struct list_head list;
    struct pmu pmu;
    struct amd_iommu *iommu;
    char name[16];
    u8 max_banks;
    u8 max_counters;
    u64 cntr_assign_mask;
    raw_spinlock_t lock;
};

Differences