pcie_link_state
Regular
4.4
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
struct list_head children;
struct list_head link;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
};
4.8
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
struct list_head children;
struct list_head link;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
};
4.10
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
struct list_head children;
struct list_head link;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
};
4.13
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
struct list_head children;
struct list_head link;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
4.15
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
struct list_head children;
struct list_head link;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
4.18
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
struct list_head children;
struct list_head link;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
5.0
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
5.3
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
5.4
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
5.8
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
5.11
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
};
5.13
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
};
5.15
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
};
5.19
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
};
6.2
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
};
6.5
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
};
6.8
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
};
arm64
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
armhf
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
ppc64el
: Absent ⚠️
riscv64
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
aws
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
azure
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
gcp
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
lowlatency
: ✅struct pcie_link_state {
struct pci_dev *pdev;
struct pci_dev *downstream;
struct pcie_link_state *root;
struct pcie_link_state *parent;
struct list_head sibling;
u32 aspm_support;
u32 aspm_enabled;
u32 aspm_capable;
u32 aspm_default;
u32 aspm_disable;
u32 clkpm_capable;
u32 clkpm_enabled;
u32 clkpm_default;
u32 clkpm_disable;
struct aspm_latency latency_up;
struct aspm_latency latency_dw;
struct aspm_latency acceptable[8];
struct (anon) l1ss;
};
Regular
4.4
and 4.8
✅
4.8
and 4.10
✅
4.10
and 4.13
⚠️struct pci_dev *downstream
struct (anon) l1ss
4.13
and 4.15
✅
4.15
and 4.18
✅
4.18
and 5.0
⚠️struct list_head children
struct list_head link
5.0
and 5.3
✅
5.3
and 5.4
⚠️u32 clkpm_disable
5.4
and 5.8
✅
5.8
and 5.11
⚠️struct (anon) l1ss
5.11
and 5.13
✅
5.13
and 5.15
✅
5.15
and 5.19
⚠️struct aspm_latency latency_up
struct aspm_latency latency_dw
struct aspm_latency acceptable[8]
5.19
and 6.2
✅
6.2
and 6.5
✅
6.5
and 6.8
✅
amd64
and arm64
✅
amd64
and armhf
✅
amd64
and riscv64
✅
generic
and aws
✅
generic
and azure
✅
generic
and gcp
✅
generic
and lowlatency
✅