DepSurf

Struct: `pci_bridge_emul_conf`

Status

Regular

In 4.4: Absent ⚠️
In 4.8: Absent ⚠️
In 4.10: Absent ⚠️
In 4.13: Absent ⚠️
In 4.15: Absent ⚠️
In 4.18: Absent ⚠️
In 5.0: Absent ⚠️
In 5.3: Absent ⚠️
In 5.4: Absent ⚠️
In 5.8: Absent ⚠️
In 5.11: Absent ⚠️
In 5.13: Absent ⚠️
In 5.15: Absent ⚠️
In 5.19: Absent ⚠️
In 6.2: Absent ⚠️
In 6.5: Absent ⚠️
In 6.8: Absent ⚠️

Arch

In arm64: ✅

struct pci_bridge_emul_conf {
    u16 vendor;
    u16 device;
    u16 command;
    u16 status;
    u32 class_revision;
    u8 cache_line_size;
    u8 latency_timer;
    u8 header_type;
    u8 bist;
    u32 bar[2];
    u8 primary_bus;
    u8 secondary_bus;
    u8 subordinate_bus;
    u8 secondary_latency_timer;
    u8 iobase;
    u8 iolimit;
    u16 secondary_status;
    u16 membase;
    u16 memlimit;
    u16 pref_mem_base;
    u16 pref_mem_limit;
    u32 prefbaseupper;
    u32 preflimitupper;
    u16 iobaseupper;
    u16 iolimitupper;
    u8 capabilities_pointer;
    u8 reserve[3];
    u32 romaddr;
    u8 intline;
    u8 intpin;
    u16 bridgectrl;
};

In armhf: ✅

struct pci_bridge_emul_conf {
    u16 vendor;
    u16 device;
    u16 command;
    u16 status;
    u32 class_revision;
    u8 cache_line_size;
    u8 latency_timer;
    u8 header_type;
    u8 bist;
    u32 bar[2];
    u8 primary_bus;
    u8 secondary_bus;
    u8 subordinate_bus;
    u8 secondary_latency_timer;
    u8 iobase;
    u8 iolimit;
    u16 secondary_status;
    u16 membase;
    u16 memlimit;
    u16 pref_mem_base;
    u16 pref_mem_limit;
    u32 prefbaseupper;
    u32 preflimitupper;
    u16 iobaseupper;
    u16 iolimitupper;
    u8 capabilities_pointer;
    u8 reserve[3];
    u32 romaddr;
    u8 intline;
    u8 intpin;
    u16 bridgectrl;
};

In ppc64el: Absent ⚠️
In riscv64: Absent ⚠️

Flavor

In aws: Absent ⚠️
In azure: Absent ⚠️
In gcp: Absent ⚠️
In lowlatency: Absent ⚠️

Differences

Arch

DepSurf

Struct: pci_bridge_emul_conf

Status

Differences

Struct: `pci_bridge_emul_conf`