DepSurf

Struct: `mp_chip_data`

Status

Regular

In 4.4: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 4.8: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 4.10: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 4.13: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 4.15: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 4.18: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 5.0: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 5.3: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 5.4: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 5.8: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In 5.11: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

In 5.13: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

In 5.15: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

In 5.19: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

In 6.2: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

In 6.5: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

In 6.8: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    bool is_level;
    bool active_low;
    bool isa_irq;
    u32 count;
};

Arch

In arm64: Absent ⚠️
In armhf: Absent ⚠️
In ppc64el: Absent ⚠️
In riscv64: Absent ⚠️

Flavor

In aws: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In azure: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In gcp: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

In lowlatency: ✅

struct mp_chip_data {
    struct list_head irq_2_pin;
    struct IO_APIC_route_entry entry;
    int trigger;
    int polarity;
    u32 count;
    bool isa_irq;
};

Differences