DepSurf

Struct: `irq_alloc_info`

Status

Regular

In 4.4: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int ht_pos;
    int ht_idx;
    struct pci_dev *ht_dev;
    void *ht_update;
};

In 4.8: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int ht_pos;
    int ht_idx;
    struct pci_dev *ht_dev;
    void *ht_update;
    struct msi_desc *desc;
};

In 4.10: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int ht_pos;
    int ht_idx;
    struct pci_dev *ht_dev;
    void *ht_update;
    struct msi_desc *desc;
};

In 4.13: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int ht_pos;
    int ht_idx;
    struct pci_dev *ht_dev;
    void *ht_update;
    struct msi_desc *desc;
};

In 4.15: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    struct msi_desc *desc;
};

In 4.18: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    struct msi_desc *desc;
};

In 5.0: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    struct msi_desc *desc;
};

In 5.3: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    struct msi_desc *desc;
};

In 5.4: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int uv_limit;
    int uv_blade;
    long unsigned int uv_offset;
    char *uv_name;
    struct msi_desc *desc;
};

In 5.8: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int uv_limit;
    int uv_blade;
    long unsigned int uv_offset;
    char *uv_name;
    struct msi_desc *desc;
};

In 5.11: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

In 5.13: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

In 5.15: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

In 5.19: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

In 6.2: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

In 6.5: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

In 6.8: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    u32 devid;
    irq_hw_number_t hwirq;
    const struct cpumask *mask;
    struct msi_desc *desc;
    void *data;
    struct ioapic_alloc_info ioapic;
    struct uv_alloc_info uv;
};

Arch

In arm64: Absent ⚠️
In armhf: Absent ⚠️
In ppc64el: Absent ⚠️
In riscv64: Absent ⚠️

Flavor

In aws: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    struct msi_desc *desc;
};

In azure: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
};

In gcp: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    struct msi_desc *desc;
};

In lowlatency: ✅

struct irq_alloc_info {
    enum irq_alloc_type type;
    u32 flags;
    const struct cpumask *mask;
    int unused;
    int hpet_id;
    int hpet_index;
    void *hpet_data;
    struct pci_dev *msi_dev;
    irq_hw_number_t msi_hwirq;
    int ioapic_id;
    int ioapic_pin;
    int ioapic_node;
    u32 ioapic_trigger;
    u32 ioapic_polarity;
    u32 ioapic_valid;
    struct IO_APIC_route_entry *ioapic_entry;
    int dmar_id;
    void *dmar_data;
    int uv_limit;
    int uv_blade;
    long unsigned int uv_offset;
    char *uv_name;
    struct msi_desc *desc;
};

Differences