DepSurf

Struct: intel_gtt_driver

Status

Regular

• In 4.4: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 4.8: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 4.10: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 4.13: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 4.15: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 4.18: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.0: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.3: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.4: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.8: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.11: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.13: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.15: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 5.19: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 6.2: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 6.5: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In 6.8: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In azure: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In gcp: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

• In lowlatency: ✅

  struct intel_gtt_driver {
      unsigned int gen;
      unsigned int is_g33;
      unsigned int is_pineview;
      unsigned int is_ironlake;
      unsigned int has_pgtbl_enable;
      unsigned int dma_mask_size;
      int (*setup)();
      void (*cleanup)();
      void (*write_entry)(dma_addr_t, unsigned int, unsigned int);
      bool (*check_flags)(unsigned int);
      void (*chipset_flush)();
  };
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• No changes between 4.8 and 4.10 ✅
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

Flavor

• No changes between generic and aws ✅
• No changes between generic and azure ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅