imx6_pcie
Regular
4.4
: Absent ⚠️
4.8
: Absent ⚠️
4.10
: Absent ⚠️
4.13
: Absent ⚠️
4.15
: Absent ⚠️
4.18
: Absent ⚠️
5.0
: Absent ⚠️
5.3
: Absent ⚠️
5.4
: Absent ⚠️
5.8
: Absent ⚠️
5.11
: Absent ⚠️
5.13
: Absent ⚠️
5.15
: Absent ⚠️
5.19
: Absent ⚠️
6.2
: Absent ⚠️
6.5
: Absent ⚠️
6.8
: Absent ⚠️
arm64
: ✅struct imx6_pcie {
struct dw_pcie *pci;
int reset_gpio;
bool gpio_active_high;
struct clk *pcie_bus;
struct clk *pcie_phy;
struct clk *pcie_inbound_axi;
struct clk *pcie;
struct clk *pcie_aux;
struct regmap *iomuxc_gpr;
u32 controller_id;
struct reset_control *pciephy_reset;
struct reset_control *apps_reset;
struct reset_control *turnoff_reset;
u32 tx_deemph_gen1;
u32 tx_deemph_gen2_3p5db;
u32 tx_deemph_gen2_6db;
u32 tx_swing_full;
u32 tx_swing_low;
int link_gen;
struct regulator *vpcie;
void *phy_base;
struct device *pd_pcie;
struct device *pd_pcie_phy;
const struct imx6_pcie_drvdata *drvdata;
};
armhf
: ✅struct imx6_pcie {
struct dw_pcie *pci;
int reset_gpio;
bool gpio_active_high;
struct clk *pcie_bus;
struct clk *pcie_phy;
struct clk *pcie_inbound_axi;
struct clk *pcie;
struct clk *pcie_aux;
struct regmap *iomuxc_gpr;
u32 controller_id;
struct reset_control *pciephy_reset;
struct reset_control *apps_reset;
struct reset_control *turnoff_reset;
u32 tx_deemph_gen1;
u32 tx_deemph_gen2_3p5db;
u32 tx_deemph_gen2_6db;
u32 tx_swing_full;
u32 tx_swing_low;
int link_gen;
struct regulator *vpcie;
void *phy_base;
struct device *pd_pcie;
struct device *pd_pcie_phy;
const struct imx6_pcie_drvdata *drvdata;
};
ppc64el
: Absent ⚠️
riscv64
: Absent ⚠️
aws
: Absent ⚠️
azure
: Absent ⚠️
gcp
: Absent ⚠️
lowlatency
: Absent ⚠️
Arch