IO_APIC_route_entry
Regular
4.4
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
4.8
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
4.10
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
4.13
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
4.15
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
4.18
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
5.0
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
5.3
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
5.4
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
5.8
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
5.11
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
5.13
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
5.15
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
5.19
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
6.2
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
6.5
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
6.8
: ✅struct IO_APIC_route_entry {
u64 vector;
u64 delivery_mode;
u64 dest_mode_logical;
u64 delivery_status;
u64 active_low;
u64 irr;
u64 is_level;
u64 masked;
u64 reserved_0;
u64 reserved_1;
u64 virt_destid_8_14;
u64 destid_0_7;
u64 ir_shared_0;
u64 ir_zero;
u64 ir_index_15;
u64 ir_shared_1;
u64 ir_reserved_0;
u64 ir_format;
u64 ir_index_0_14;
u64 w1;
u64 w2;
};
arm64
: Absent ⚠️
armhf
: Absent ⚠️
ppc64el
: Absent ⚠️
riscv64
: Absent ⚠️
aws
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
azure
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
gcp
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
lowlatency
: ✅struct IO_APIC_route_entry {
__u32 vector;
__u32 delivery_mode;
__u32 dest_mode;
__u32 delivery_status;
__u32 polarity;
__u32 irr;
__u32 trigger;
__u32 mask;
__u32 __reserved_2;
__u32 __reserved_3;
__u32 dest;
};
Regular
4.4
and 4.8
✅
4.8
and 4.10
✅
4.10
and 4.13
✅
4.13
and 4.15
✅
4.15
and 4.18
✅
4.18
and 5.0
✅
5.0
and 5.3
✅
5.3
and 5.4
✅
5.4
and 5.8
✅
5.8
and 5.11
⚠️u64 dest_mode_logical
u64 active_low
u64 is_level
u64 masked
u64 reserved_0
u64 reserved_1
u64 virt_destid_8_14
u64 destid_0_7
u64 ir_shared_0
u64 ir_zero
u64 ir_index_15
u64 ir_shared_1
u64 ir_reserved_0
u64 ir_format
u64 ir_index_0_14
u64 w1
u64 w2
__u32 dest_mode
__u32 polarity
__u32 trigger
__u32 mask
__u32 __reserved_2
__u32 __reserved_3
__u32 dest
__u32 vector
➡️ u64 vector
__u32 delivery_mode
➡️ u64 delivery_mode
__u32 delivery_status
➡️ u64 delivery_status
__u32 irr
➡️ u64 irr
5.11
and 5.13
✅
5.13
and 5.15
✅
5.15
and 5.19
✅
5.19
and 6.2
✅
6.2
and 6.5
✅
6.5
and 6.8
✅
generic
and aws
✅
generic
and azure
✅
generic
and gcp
✅
generic
and lowlatency
✅