cxl_afu
Regular
4.4
: Absent ⚠️
4.8
: Absent ⚠️
4.10
: Absent ⚠️
4.13
: Absent ⚠️
4.15
: Absent ⚠️
4.18
: Absent ⚠️
5.0
: Absent ⚠️
5.3
: Absent ⚠️
5.4
: Absent ⚠️
5.8
: Absent ⚠️
5.11
: Absent ⚠️
5.13
: Absent ⚠️
5.15
: Absent ⚠️
5.19
: Absent ⚠️
6.2
: Absent ⚠️
6.5
: Absent ⚠️
6.8
: Absent ⚠️
arm64
: Absent ⚠️
armhf
: Absent ⚠️
ppc64el
: ✅struct cxl_afu {
struct cxl_afu_native *native;
struct cxl_afu_guest *guest;
irq_hw_number_t serr_hwirq;
unsigned int serr_virq;
char *psl_irq_name;
char *err_irq_name;
void *p2n_mmio;
phys_addr_t psn_phys;
u64 pp_size;
struct cxl *adapter;
struct device dev;
struct cdev afu_cdev_s;
struct cdev afu_cdev_m;
struct cdev afu_cdev_d;
struct device *chardev_s;
struct device *chardev_m;
struct device *chardev_d;
struct idr contexts_idr;
struct dentry *debugfs;
struct mutex contexts_lock;
spinlock_t afu_cntl_lock;
atomic_t configured_state;
u64 eb_len;
u64 eb_offset;
struct bin_attribute attr_eb;
struct pci_controller *phb;
int pp_irqs;
int irqs_max;
int num_procs;
int max_procs_virtualised;
int slice;
int modes_supported;
int current_mode;
int crs_num;
u64 crs_len;
u64 crs_offset;
struct list_head crs;
enum prefault_modes prefault_mode;
bool psa;
bool pp_psa;
bool enabled;
};
riscv64
: Absent ⚠️
aws
: Absent ⚠️
azure
: Absent ⚠️
gcp
: Absent ⚠️
lowlatency
: Absent ⚠️
Arch