DepSurf

Struct: `armada_thermal_data`

Status

Regular

In 4.4: Absent ⚠️
In 4.8: Absent ⚠️
In 4.10: Absent ⚠️
In 4.13: Absent ⚠️
In 4.15: Absent ⚠️
In 4.18: Absent ⚠️
In 5.0: Absent ⚠️
In 5.3: Absent ⚠️
In 5.4: Absent ⚠️
In 5.8: Absent ⚠️
In 5.11: Absent ⚠️
In 5.13: Absent ⚠️
In 5.15: Absent ⚠️
In 5.19: Absent ⚠️
In 6.2: Absent ⚠️
In 6.5: Absent ⚠️
In 6.8: Absent ⚠️

Arch

In arm64: ✅

struct armada_thermal_data {
    void (*init)(struct platform_device *, struct armada_thermal_priv *);
    s64 coef_b;
    s64 coef_m;
    u32 coef_div;
    bool inverted;
    bool signed_sample;
    unsigned int temp_shift;
    unsigned int temp_mask;
    unsigned int thresh_shift;
    unsigned int hyst_shift;
    unsigned int hyst_mask;
    u32 is_valid_bit;
    unsigned int syscon_control0_off;
    unsigned int syscon_control1_off;
    unsigned int syscon_status_off;
    unsigned int dfx_irq_cause_off;
    unsigned int dfx_irq_mask_off;
    unsigned int dfx_overheat_irq;
    unsigned int dfx_server_irq_mask_off;
    unsigned int dfx_server_irq_en;
    unsigned int cpu_nr;
};

In armhf: ✅

struct armada_thermal_data {
    void (*init)(struct platform_device *, struct armada_thermal_priv *);
    s64 coef_b;
    s64 coef_m;
    u32 coef_div;
    bool inverted;
    bool signed_sample;
    unsigned int temp_shift;
    unsigned int temp_mask;
    unsigned int thresh_shift;
    unsigned int hyst_shift;
    unsigned int hyst_mask;
    u32 is_valid_bit;
    unsigned int syscon_control0_off;
    unsigned int syscon_control1_off;
    unsigned int syscon_status_off;
    unsigned int dfx_irq_cause_off;
    unsigned int dfx_irq_mask_off;
    unsigned int dfx_overheat_irq;
    unsigned int dfx_server_irq_mask_off;
    unsigned int dfx_server_irq_en;
    unsigned int cpu_nr;
};

In ppc64el: Absent ⚠️
In riscv64: Absent ⚠️

Flavor

In aws: Absent ⚠️
In azure: Absent ⚠️
In gcp: Absent ⚠️
In lowlatency: Absent ⚠️

Differences

Arch

DepSurf

Struct: armada_thermal_data

Status

Differences

Struct: `armada_thermal_data`