amd_gpio
Regular
4.4
: ✅struct amd_gpio {
spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
struct resource *res;
struct platform_device *pdev;
};
4.8
: ✅struct amd_gpio {
spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
struct resource *res;
struct platform_device *pdev;
};
4.10
: ✅struct amd_gpio {
spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
struct resource *res;
struct platform_device *pdev;
};
4.13
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
4.15
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
4.18
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.0
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.3
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.4
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.8
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.11
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.13
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
5.15
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
int irq;
};
5.19
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
int irq;
};
6.2
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
void *iomux_base;
const struct pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
int irq;
};
6.5
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
void *iomux_base;
const struct pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
int irq;
};
6.8
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
void *iomux_base;
const struct pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
int irq;
};
arm64
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
armhf
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
ppc64el
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
riscv64
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
aws
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
azure
: Absent ⚠️
gcp
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
lowlatency
: ✅struct amd_gpio {
raw_spinlock_t lock;
void *base;
const struct amd_pingroup *groups;
u32 ngroups;
struct pinctrl_dev *pctrl;
struct gpio_chip gc;
unsigned int hwbank_num;
struct resource *res;
struct platform_device *pdev;
u32 *saved_regs;
};
Regular
4.4
and 4.8
✅
4.8
and 4.10
✅
4.10
and 4.13
⚠️unsigned int hwbank_num
u32 *saved_regs
spinlock_t lock
➡️ raw_spinlock_t lock
4.13
and 4.15
✅
4.15
and 4.18
✅
4.18
and 5.0
✅
5.0
and 5.3
✅
5.3
and 5.4
✅
5.4
and 5.8
✅
5.8
and 5.11
✅
5.11
and 5.13
✅
5.13
and 5.15
⚠️int irq
5.15
and 5.19
✅
5.19
and 6.2
⚠️void *iomux_base
const struct amd_pingroup *groups
➡️ const struct pingroup *groups
6.2
and 6.5
✅
6.5
and 6.8
✅
amd64
and arm64
✅
amd64
and armhf
✅
amd64
and ppc64el
✅
amd64
and riscv64
✅
generic
and aws
✅
generic
and gcp
✅
generic
and lowlatency
✅