DepSurf

Function: uncore_pmu_to_box

Status

Regular

• In 4.4: Selective Inline, Transformation ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff810155a0)
  Location: arch/x86/events/intel/uncore.c:90
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_change_context
    - arch/x86/events/intel/uncore.c:uncore_change_context
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
    - arch/x86/events/intel/uncore.c:uncore_event_to_box
  Direct callers:
    - arch/x86/events/intel/uncore.c:uncore_change_context
    - arch/x86/events/intel/uncore.c:uncore_change_context
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
    - arch/x86/events/intel/uncore.c:uncore_event_to_box
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff810155a0-ffffffff8101566f: uncore_pmu_to_box.part.17 (STB_LOCAL)
  ffffffff81016630-ffffffff8101665c: uncore_pmu_to_box (STB_GLOBAL)
  

• In 4.8: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff810151ab)
  Location: arch/x86/events/intel/uncore.c:101
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81015a40-ffffffff81015a70: uncore_pmu_to_box (STB_GLOBAL)
  

• In 4.10: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff8101528b)
  Location: arch/x86/events/intel/uncore.c:101
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81015c00-ffffffff81015c3f: uncore_pmu_to_box (STB_GLOBAL)
  

• In 4.13: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff810137a6)
  Location: arch/x86/events/intel/uncore.c:101
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff810140b0-ffffffff810140ef: uncore_pmu_to_box (STB_GLOBAL)
  

• In 4.15: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81013fe6)
  Location: arch/x86/events/intel/uncore.c:101
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff810148e0-ffffffff8101491f: uncore_pmu_to_box (STB_GLOBAL)
  

• In 4.18: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81014716)
  Location: arch/x86/events/intel/uncore.c:101
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81015420-ffffffff8101545a: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.0: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81014e16)
  Location: arch/x86/events/intel/uncore.c:101
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81015b30-ffffffff81015b6a: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.3: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81016458)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff810170e0-ffffffff81017121: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.4: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81016471)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81017a90-ffffffff81017ad1: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.8: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff810189c1)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81019640-ffffffff81019681: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.11: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81019141)
  Location: arch/x86/events/intel/uncore.c:105
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81019c80-ffffffff81019cc1: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.13: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff8101a461)
  Location: arch/x86/events/intel/uncore.c:122
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff8101b000-ffffffff8101b041: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.15: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff8101cdaf)
  Location: arch/x86/events/intel/uncore.c:122
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff8101d900-ffffffff8101d972: uncore_pmu_to_box (STB_GLOBAL)
  

• In 5.19: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff8101f5bf)
  Location: arch/x86/events/intel/uncore.c:122
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81020300-ffffffff8102037a: uncore_pmu_to_box (STB_GLOBAL)
  

• In 6.2: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81023d2f)
  Location: arch/x86/events/intel/uncore.c:122
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81024bd0-ffffffff81024c4a: uncore_pmu_to_box (STB_GLOBAL)
  

• In 6.5: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81023a4f)
  Location: arch/x86/events/intel/uncore.c:137
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81024ad0-ffffffff81024b4a: uncore_pmu_to_box (STB_GLOBAL)
  

• In 6.8: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81029b7f)
  Location: arch/x86/events/intel/uncore.c:137
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff8102ac30-ffffffff8102aca7: uncore_pmu_to_box (STB_GLOBAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81016471)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81017a90-ffffffff81017ad1: uncore_pmu_to_box (STB_GLOBAL)
  

• In azure: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff810158a1)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81016ec0-ffffffff81016f01: uncore_pmu_to_box (STB_GLOBAL)
  

• In gcp: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81016431)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81017a50-ffffffff81017a91: uncore_pmu_to_box (STB_GLOBAL)
  

• In lowlatency: Selective Inline ⚠️

  struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore.c (ffffffff81016671)
  Location: arch/x86/events/intel/uncore.c:103
  Inline: True
  Inline callers:
    - arch/x86/events/intel/uncore.c:uncore_pmu_disable
    - arch/x86/events/intel/uncore.c:uncore_pmu_enable
    - arch/x86/events/intel/uncore.c:uncore_pmu_event_init
  Direct callers:
    - arch/x86/events/intel/uncore_snb.c:snb_uncore_imc_event_init
  

  Symbols:

  ffffffff81017c90-ffffffff81017cd1: uncore_pmu_to_box (STB_GLOBAL)
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• No changes between 4.8 and 4.10 ✅
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

Flavor

• No changes between generic and aws ✅
• No changes between generic and azure ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅