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Function: `rockchip_rk3066_pll_set_rate`

Regular

Arch

In arm64: ✅

int rockchip_rk3066_pll_set_rate(struct clk_hw *hw, long unsigned int drate, long unsigned int prate);

Collision: Unique Static

Inline: No

Transformation: False

Instances:

In drivers/clk/rockchip/clk-pll.c (ffff8000107ed238)
Location: drivers/clk/rockchip/clk-pll.c:470
Inline: False

Symbols:

ffff8000107ed238-ffff8000107ed320: rockchip_rk3066_pll_set_rate (STB_LOCAL)

In armhf: Selective Inline ⚠️

int rockchip_rk3066_pll_set_rate(struct clk_hw *hw, long unsigned int drate, long unsigned int prate);

Collision: Unique Static

Inline: Selective

Transformation: False

Instances:

In drivers/clk/rockchip/clk-pll.c (c09073b4)
Location: drivers/clk/rockchip/clk-pll.c:470
Inline: True

Symbols:

c09073b4-c090748c: rockchip_rk3066_pll_set_rate (STB_LOCAL)

Flavor

Arch