DepSurf

Function: nhmex_uncore_msr_enable_event

Status

Regular

• In 4.4: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017fe0)
  Location: arch/x86/events/intel/uncore_nhmex.c:239
  Inline: True
  

  Symbols:

  ffffffff81017fe0-ffffffff81018050: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 4.8: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017240)
  Location: arch/x86/events/intel/uncore_nhmex.c:244
  Inline: True
  

  Symbols:

  ffffffff81017240-ffffffff810172b0: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 4.10: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017450)
  Location: arch/x86/events/intel/uncore_nhmex.c:244
  Inline: True
  

  Symbols:

  ffffffff81017450-ffffffff810174c0: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 4.13: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81015750)
  Location: arch/x86/events/intel/uncore_nhmex.c:244
  Inline: True
  

  Symbols:

  ffffffff81015750-ffffffff810157bf: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 4.15: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff810168c0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff810168c0-ffffffff81016932: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 4.18: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017380)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81017380-ffffffff810173f2: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.0: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017bb0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81017bb0-ffffffff81017c22: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.3: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff810191b0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff810191b0-ffffffff8101921c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.4: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019b30)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81019b30-ffffffff81019b9c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.8: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101b5f0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff8101b5f0-ffffffff8101b659: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.11: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101baf0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff8101baf0-ffffffff8101bb5d: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.13: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101cea0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff8101cea0-ffffffff8101cf0c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.15: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101ffa0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff8101ffa0-ffffffff8102000c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 5.19: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81022eb0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff81022eb0-ffffffff81022f67: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 6.2: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81027bb0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff81027bb0-ffffffff81027c67: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 6.5: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81027bd0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff81027bd0-ffffffff81027c87: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In 6.8: ✅

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff8102dd30)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: False
  

  Symbols:

  ffffffff8102dd30-ffffffff8102dde7: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019b30)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81019b30-ffffffff81019b9c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In azure: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019010)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81019010-ffffffff81019099: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In gcp: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019af0)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81019af0-ffffffff81019b5c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

• In lowlatency: Selective Inline ⚠️

  void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019d30)
  Location: arch/x86/events/intel/uncore_nhmex.c:245
  Inline: True
  

  Symbols:

  ffffffff81019d30-ffffffff81019d9c: nhmex_uncore_msr_enable_event (STB_LOCAL)
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• No changes between 4.8 and 4.10 ✅
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

Flavor

• No changes between generic and aws ✅
• No changes between generic and azure ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅