nhmex_uncore_msr_disable_box
Regular
4.4
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017130)
Location: arch/x86/events/intel/uncore_nhmex.c:204
Inline: False
Symbols:
ffffffff81017130-ffffffff81017228: nhmex_uncore_msr_disable_box (STB_LOCAL)
4.8
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff810163d0)
Location: arch/x86/events/intel/uncore_nhmex.c:209
Inline: False
Symbols:
ffffffff810163d0-ffffffff81016494: nhmex_uncore_msr_disable_box (STB_LOCAL)
4.10
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff810165e0)
Location: arch/x86/events/intel/uncore_nhmex.c:209
Inline: False
Symbols:
ffffffff810165e0-ffffffff810166a4: nhmex_uncore_msr_disable_box (STB_LOCAL)
4.13
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81014b70)
Location: arch/x86/events/intel/uncore_nhmex.c:209
Inline: False
Symbols:
ffffffff81014b70-ffffffff81014c27: nhmex_uncore_msr_disable_box (STB_LOCAL)
4.15
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff810169f0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff810169f0-ffffffff81016aa7: nhmex_uncore_msr_disable_box (STB_LOCAL)
4.18
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff810174b0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff810174b0-ffffffff8101755b: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.0
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81017c30)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81017c30-ffffffff81017cdb: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.3
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019220)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81019220-ffffffff810192cb: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.4
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019ba0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81019ba0-ffffffff81019c4b: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.8
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101b540)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff8101b540-ffffffff8101b5eb: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.11
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101ba40)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff8101ba40-ffffffff8101baeb: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.13
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff8101cdf0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff8101cdf0-ffffffff8101ce9b: nhmex_uncore_msr_disable_box (STB_LOCAL)
5.15
: Transformation ⚠️void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: True
Instances:
In arch/x86/events/intel/uncore_nhmex.c (0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff8101fee0-ffffffff8101ffa0: nhmex_uncore_msr_disable_box (STB_LOCAL)
ffffffff81c96ab9-ffffffff81c96aef: nhmex_uncore_msr_disable_box.cold (STB_LOCAL)
5.19
: Transformation ⚠️void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: True
Instances:
In arch/x86/events/intel/uncore_nhmex.c (0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81022dd0-ffffffff81022eaf: nhmex_uncore_msr_disable_box (STB_LOCAL)
ffffffff81e45f3e-ffffffff81e45f74: nhmex_uncore_msr_disable_box.cold (STB_LOCAL)
6.2
: Transformation ⚠️void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: True
Instances:
In arch/x86/events/intel/uncore_nhmex.c (0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81027ac0-ffffffff81027b9f: nhmex_uncore_msr_disable_box (STB_LOCAL)
ffffffff82051581-ffffffff820515b7: nhmex_uncore_msr_disable_box.cold (STB_LOCAL)
6.5
: Transformation ⚠️void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: True
Instances:
In arch/x86/events/intel/uncore_nhmex.c (0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81027ae0-ffffffff81027bbf: nhmex_uncore_msr_disable_box (STB_LOCAL)
ffffffff820cfa8d-ffffffff820cfac3: nhmex_uncore_msr_disable_box.cold (STB_LOCAL)
6.8
: Transformation ⚠️void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: True
Instances:
In arch/x86/events/intel/uncore_nhmex.c (0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff8102db40-ffffffff8102dc1f: nhmex_uncore_msr_disable_box (STB_LOCAL)
ffffffff821aa3c5-ffffffff821aa3fb: nhmex_uncore_msr_disable_box.cold (STB_LOCAL)
arm64
: Absent ⚠️
armhf
: Absent ⚠️
ppc64el
: Absent ⚠️
riscv64
: Absent ⚠️
aws
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019ba0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81019ba0-ffffffff81019c4b: nhmex_uncore_msr_disable_box (STB_LOCAL)
azure
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff810190a0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff810190a0-ffffffff8101917c: nhmex_uncore_msr_disable_box (STB_LOCAL)
gcp
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019b60)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81019b60-ffffffff81019c0b: nhmex_uncore_msr_disable_box (STB_LOCAL)
lowlatency
: ✅void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box);
Collision: Unique Static
Inline: No
Transformation: False
Instances:
In arch/x86/events/intel/uncore_nhmex.c (ffffffff81019da0)
Location: arch/x86/events/intel/uncore_nhmex.c:210
Inline: False
Symbols:
ffffffff81019da0-ffffffff81019e4b: nhmex_uncore_msr_disable_box (STB_LOCAL)
Regular
4.4
and 4.8
✅
4.8
and 4.10
✅
4.10
and 4.13
✅
4.13
and 4.15
✅
4.15
and 4.18
✅
4.18
and 5.0
✅
5.0
and 5.3
✅
5.3
and 5.4
✅
5.4
and 5.8
✅
5.8
and 5.11
✅
5.11
and 5.13
✅
5.13
and 5.15
✅
5.15
and 5.19
✅
5.19
and 6.2
✅
6.2
and 6.5
✅
6.5
and 6.8
✅
generic
and aws
✅
generic
and azure
✅
generic
and gcp
✅
generic
and lowlatency
✅