DepSurf

Function: lbr_from_signext_quirk_needed

Status

Regular

• In 4.4: Absent ⚠️
• In 4.8: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81011be5)
  Location: arch/x86/events/intel/lbr.c:258
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 4.10: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81011d15)
  Location: arch/x86/events/intel/lbr.c:258
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 4.13: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81010315)
  Location: arch/x86/events/intel/lbr.c:258
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 4.15: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81010b45)
  Location: arch/x86/events/intel/lbr.c:262
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 4.18: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81011602)
  Location: arch/x86/events/intel/lbr.c:262
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.0: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81011c62)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.3: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81012fd2)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.4: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81013782)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.8: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81014d82)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.11: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101520c)
  Location: arch/x86/events/intel/lbr.c:318
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.13: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81016483)
  Location: arch/x86/events/intel/lbr.c:318
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.15: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81017ee3)
  Location: arch/x86/events/intel/lbr.c:318
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In 5.19: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101a029)
  Location: arch/x86/events/intel/lbr.c:298
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init
  

• In 6.2: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101e0a9)
  Location: arch/x86/events/intel/lbr.c:238
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init
  

• In 6.5: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101dda9)
  Location: arch/x86/events/intel/lbr.c:238
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init
  

• In 6.8: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81023e79)
  Location: arch/x86/events/intel/lbr.c:238
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81013782)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In azure: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810128f2)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In gcp: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81013742)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

• In lowlatency: Full Inline ⚠️

  Collision: Unique Static

  Inline: Full

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81013962)
  Location: arch/x86/events/intel/lbr.c:267
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_init_hsw
  

Differences