DepSurf

Function: intel_pmu_lbr_reset

Status

Regular

• In 4.4: Selective Inline, Transformation ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810115b0)
  Location: arch/x86/events/intel/lbr.c:202
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_enable
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_enable
  

  Symbols:

  ffffffff810115b0-ffffffff81011670: intel_pmu_lbr_reset.part.1 (STB_LOCAL)
  ffffffff81011670-ffffffff8101168b: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 4.8: Selective Inline, Transformation ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81011322)
  Location: arch/x86/events/intel/lbr.c:213
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_enable
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_enable
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81010ef0-ffffffff81010fca: intel_pmu_lbr_reset.part.1 (STB_LOCAL)
  ffffffff81010fd0-ffffffff81010feb: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 4.10: Selective Inline, Transformation ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810114a1)
  Location: arch/x86/events/intel/lbr.c:213
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81011050-ffffffff8101112a: intel_pmu_lbr_reset.part.1 (STB_LOCAL)
  ffffffff81011130-ffffffff8101114b: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 4.13: Selective Inline, Transformation ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8100faf1)
  Location: arch/x86/events/intel/lbr.c:213
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff8100f700-ffffffff8100f7c1: intel_pmu_lbr_reset.part.1 (STB_LOCAL)
  ffffffff8100f7d0-ffffffff8100f7ec: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 4.15: Selective Inline, Transformation ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81010291)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff8100fea0-ffffffff8100ff61: intel_pmu_lbr_reset.part.1 (STB_LOCAL)
  ffffffff8100ff70-ffffffff8100ff8c: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 4.18: Selective Inline, Transformation ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81010cf1)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81010820-ffffffff810108e1: intel_pmu_lbr_reset.part.1 (STB_LOCAL)
  ffffffff810108f0-ffffffff8101090b: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.0: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81010e00)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81010e00-ffffffff81010eed: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.3: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810121e0)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff810121e0-ffffffff810122c5: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.4: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81012990)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81012990-ffffffff81012a75: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.8: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810141c0)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

  Symbols:

  ffffffff810141c0-ffffffff810142a2: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.11: Selective Inline ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810149a8)
  Location: arch/x86/events/intel/lbr.c:271
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
  

  Symbols:

  ffffffff810143a0-ffffffff810143ea: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.13: Selective Inline ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81015ade)
  Location: arch/x86/events/intel/lbr.c:271
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
  

  Symbols:

  ffffffff81015500-ffffffff8101554a: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.15: Selective Inline ⚠️

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810170ee)
  Location: arch/x86/events/intel/lbr.c:271
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
  

  Symbols:

  ffffffff81016b20-ffffffff81016b6a: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 5.19: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81018cc0)
  Location: arch/x86/events/intel/lbr.c:249
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

  Symbols:

  ffffffff81018cc0-ffffffff81018d45: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 6.2: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101cb80)
  Location: arch/x86/events/intel/lbr.c:189
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

  Symbols:

  ffffffff8101cb80-ffffffff8101cc23: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 6.5: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101c840)
  Location: arch/x86/events/intel/lbr.c:189
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

  Symbols:

  ffffffff8101c840-ffffffff8101c8e3: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In 6.8: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810227d0)
  Location: arch/x86/events/intel/lbr.c:189
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_del
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
    - arch/x86/events/intel/lbr.c:__intel_pmu_lbr_restore
  

  Symbols:

  ffffffff810227d0-ffffffff81022873: intel_pmu_lbr_reset (STB_GLOBAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81012990)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81012990-ffffffff81012a75: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In azure: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810118c0)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff810118c0-ffffffff810119e9: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In gcp: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81012950)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81012950-ffffffff81012a35: intel_pmu_lbr_reset (STB_GLOBAL)
  

• In lowlatency: ✅

  void intel_pmu_lbr_reset();
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81012b70)
  Location: arch/x86/events/intel/lbr.c:217
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_cpu_starting
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_add
    - arch/x86/events/intel/lbr.c:intel_pmu_lbr_sched_task
  

  Symbols:

  ffffffff81012b70-ffffffff81012c55: intel_pmu_lbr_reset (STB_GLOBAL)
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• No changes between 4.8 and 4.10 ✅
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

Flavor

• No changes between generic and aws ✅
• No changes between generic and azure ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅