DepSurf

Function: intel_pmu_lbr_enable

Status

Regular

• In 4.4: ✅

  void intel_pmu_lbr_enable(struct perf_event *event);
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81011930)
  Location: arch/x86/events/intel/lbr.c:322
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_enable_event
  

  Symbols:

  ffffffff81011930-ffffffff810119e2: intel_pmu_lbr_enable (STB_GLOBAL)
  

• In 4.8: ✅

  void intel_pmu_lbr_enable(struct perf_event *event);
  

  Collision: Unique Global

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810112e0)
  Location: arch/x86/events/intel/lbr.c:425
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_enable_event
  

  Symbols:

  ffffffff810112e0-ffffffff81011392: intel_pmu_lbr_enable (STB_GLOBAL)
  

• In 4.10: Absent ⚠️
• In 4.13: Absent ⚠️
• In 4.15: Absent ⚠️
• In 4.18: Absent ⚠️
• In 5.0: Absent ⚠️
• In 5.3: Absent ⚠️
• In 5.4: Absent ⚠️
• In 5.8: Absent ⚠️
• In 5.11: Absent ⚠️
• In 5.13: Absent ⚠️
• In 5.15: Absent ⚠️
• In 5.19: Absent ⚠️
• In 6.2: Absent ⚠️
• In 6.5: Absent ⚠️
• In 6.8: Absent ⚠️

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Absent ⚠️
• In azure: Absent ⚠️
• In gcp: Absent ⚠️
• In lowlatency: Absent ⚠️

Differences

Regular

• No changes between 4.4 and 4.8 ✅