DepSurf

Function: intel_pmu_hw_config

Status

Regular

• In 4.4: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100b720)
  Location: arch/x86/events/intel/core.c:2531
  Inline: True
  

  Symbols:

  ffffffff8100b720-ffffffff8100b84e: intel_pmu_hw_config (STB_LOCAL)
  

• In 4.8: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100b8c0)
  Location: arch/x86/events/intel/core.c:2814
  Inline: True
  

  Symbols:

  ffffffff8100b8c0-ffffffff8100ba07: intel_pmu_hw_config (STB_LOCAL)
  

• In 4.10: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100b990)
  Location: arch/x86/events/intel/core.c:2829
  Inline: True
  

  Symbols:

  ffffffff8100b990-ffffffff8100bad7: intel_pmu_hw_config (STB_LOCAL)
  

• In 4.13: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100b770)
  Location: arch/x86/events/intel/core.c:2964
  Inline: True
  

  Symbols:

  ffffffff8100b770-ffffffff8100b8ae: intel_pmu_hw_config (STB_LOCAL)
  

• In 4.15: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100bbb0)
  Location: arch/x86/events/intel/core.c:2968
  Inline: True
  

  Symbols:

  ffffffff8100bbb0-ffffffff8100bd23: intel_pmu_hw_config (STB_LOCAL)
  

• In 4.18: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100c290)
  Location: arch/x86/events/intel/core.c:2984
  Inline: True
  

  Symbols:

  ffffffff8100c290-ffffffff8100c455: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.0: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100c370)
  Location: arch/x86/events/intel/core.c:3175
  Inline: True
  

  Symbols:

  ffffffff8100c370-ffffffff8100c53d: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.3: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100cae0)
  Location: arch/x86/events/intel/core.c:3259
  Inline: True
  

  Symbols:

  ffffffff8100cae0-ffffffff8100ccce: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.4: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100cf10)
  Location: arch/x86/events/intel/core.c:3260
  Inline: True
  

  Symbols:

  ffffffff8100cf10-ffffffff8100d134: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.8: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100da30)
  Location: arch/x86/events/intel/core.c:3279
  Inline: True
  

  Symbols:

  ffffffff8100da30-ffffffff8100dc58: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff8100ddc0-ffffffff8100ddf7: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.11: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100cb50)
  Location: arch/x86/events/intel/core.c:3566
  Inline: True
  

  Symbols:

  ffffffff8100cb50-ffffffff8100ce62: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff8100cf90-ffffffff8100cfc7: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.13: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100d580)
  Location: arch/x86/events/intel/core.c:3713
  Inline: True
  

  Symbols:

  ffffffff8100d580-ffffffff8100d982: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff8100dae0-ffffffff8100db17: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.15: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100e914)
  Location: arch/x86/events/intel/core.c:3720
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  Direct callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  

  Symbols:

  ffffffff8100db40-ffffffff8100df42: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff8100e110-ffffffff8100e147: intel_pmu_hw_config (STB_LOCAL)
  

• In 5.19: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100fc63)
  Location: arch/x86/events/intel/core.c:3782
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  Direct callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  

  Symbols:

  ffffffff8100ef60-ffffffff8100f37a: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff8100f660-ffffffff8100f6a2: intel_pmu_hw_config (STB_LOCAL)
  

• In 6.2: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81013913)
  Location: arch/x86/events/intel/core.c:3855
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  Direct callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  

  Symbols:

  ffffffff81012920-ffffffff81012d11: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff81013070-ffffffff810130b2: intel_pmu_hw_config (STB_LOCAL)
  

• In 6.5: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81012ec3)
  Location: arch/x86/events/intel/core.c:3873
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  Direct callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  

  Symbols:

  ffffffff81011e90-ffffffff81012297: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff81012640-ffffffff81012682: intel_pmu_hw_config (STB_LOCAL)
  

• In 6.8: Selective Inline, Transformation ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81018564)
  Location: arch/x86/events/intel/core.c:3888
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  Direct callers:
    - arch/x86/events/intel/core.c:adl_hw_config
  

  Symbols:

  ffffffff81017690-ffffffff81017bbf: intel_pmu_hw_config.part.0 (STB_LOCAL)
  ffffffff81017f60-ffffffff81017fa2: intel_pmu_hw_config (STB_LOCAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100cf10)
  Location: arch/x86/events/intel/core.c:3260
  Inline: True
  

  Symbols:

  ffffffff8100cf10-ffffffff8100d134: intel_pmu_hw_config (STB_LOCAL)
  

• In azure: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100b710)
  Location: arch/x86/events/intel/core.c:3260
  Inline: True
  

  Symbols:

  ffffffff8100b710-ffffffff8100b934: intel_pmu_hw_config (STB_LOCAL)
  

• In gcp: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100ced0)
  Location: arch/x86/events/intel/core.c:3260
  Inline: True
  

  Symbols:

  ffffffff8100ced0-ffffffff8100d0f4: intel_pmu_hw_config (STB_LOCAL)
  

• In lowlatency: Selective Inline ⚠️

  int intel_pmu_hw_config(struct perf_event *event);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100d100)
  Location: arch/x86/events/intel/core.c:3260
  Inline: True
  

  Symbols:

  ffffffff8100d100-ffffffff8100d324: intel_pmu_hw_config (STB_LOCAL)
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• No changes between 4.8 and 4.10 ✅
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.0 and 5.3 ✅
• No changes between 5.3 and 5.4 ✅
• No changes between 5.4 and 5.8 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅

Arch

Flavor

• No changes between generic and aws ✅
• No changes between generic and azure ✅
• No changes between generic and gcp ✅
• No changes between generic and lowlatency ✅