DepSurf

Function: intel_pmu_arch_lbr_reset

Status

Regular

• In 4.4: Absent ⚠️
• In 4.8: Absent ⚠️
• In 4.10: Absent ⚠️
• In 4.13: Absent ⚠️
• In 4.15: Absent ⚠️
• In 4.18: Absent ⚠️
• In 5.0: Absent ⚠️
• In 5.3: Absent ⚠️
• In 5.4: Absent ⚠️
• In 5.8: Absent ⚠️
• In 5.11: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81014009)
  Location: arch/x86/events/intel/lbr.c:265
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff81013ba0-ffffffff81013bbf: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

• In 5.13: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810151c9)
  Location: arch/x86/events/intel/lbr.c:265
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff81014d60-ffffffff81014d7f: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

• In 5.15: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810167f6)
  Location: arch/x86/events/intel/lbr.c:265
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff81016380-ffffffff8101639f: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

• In 5.19: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81018a40)
  Location: arch/x86/events/intel/lbr.c:243
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff81018540-ffffffff81018578: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

• In 6.2: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101c8c0)
  Location: arch/x86/events/intel/lbr.c:183
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff8101c360-ffffffff8101c398: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

• In 6.5: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101c580)
  Location: arch/x86/events/intel/lbr.c:183
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff8101c020-ffffffff8101c058: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

• In 6.8: Selective Inline ⚠️

  void intel_pmu_arch_lbr_reset();
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81022510)
  Location: arch/x86/events/intel/lbr.c:183
  Inline: True
  Inline callers:
    - arch/x86/events/intel/lbr.c:intel_pmu_arch_lbr_restore
  

  Symbols:

  ffffffff81021fa0-ffffffff81021fd8: intel_pmu_arch_lbr_reset (STB_LOCAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Absent ⚠️
• In azure: Absent ⚠️
• In gcp: Absent ⚠️
• In lowlatency: Absent ⚠️

Differences

Regular

• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅