DepSurf

Function: intel_pmu_arch_lbr_read_xsave

Status

Regular

• In 4.4: Absent ⚠️
• In 4.8: Absent ⚠️
• In 4.10: Absent ⚠️
• In 4.13: Absent ⚠️
• In 4.15: Absent ⚠️
• In 4.18: Absent ⚠️
• In 5.0: Absent ⚠️
• In 5.3: Absent ⚠️
• In 5.4: Absent ⚠️
• In 5.8: Absent ⚠️
• In 5.11: ✅

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81013ef0)
  Location: arch/x86/events/intel/lbr.c:972
  Inline: False
  

  Symbols:

  ffffffff81013ef0-ffffffff81013f39: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

• In 5.13: ✅

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810150b0)
  Location: arch/x86/events/intel/lbr.c:988
  Inline: False
  

  Symbols:

  ffffffff810150b0-ffffffff810150f9: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

• In 5.15: ✅

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810166e0)
  Location: arch/x86/events/intel/lbr.c:988
  Inline: False
  

  Symbols:

  ffffffff810166e0-ffffffff81016729: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

• In 5.19: Selective Inline ⚠️

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff81018900)
  Location: arch/x86/events/intel/lbr.c:971
  Inline: True
  

  Symbols:

  ffffffff81018900-ffffffff81018959: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

• In 6.2: Selective Inline ⚠️

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101c770)
  Location: arch/x86/events/intel/lbr.c:911
  Inline: True
  

  Symbols:

  ffffffff8101c770-ffffffff8101c7c9: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

• In 6.5: Selective Inline ⚠️

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff8101c430)
  Location: arch/x86/events/intel/lbr.c:911
  Inline: True
  

  Symbols:

  ffffffff8101c430-ffffffff8101c489: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

• In 6.8: Selective Inline ⚠️

  void intel_pmu_arch_lbr_read_xsave(struct cpu_hw_events *cpuc);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/lbr.c (ffffffff810223c0)
  Location: arch/x86/events/intel/lbr.c:988
  Inline: True
  

  Symbols:

  ffffffff810223c0-ffffffff81022419: intel_pmu_arch_lbr_read_xsave (STB_LOCAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Absent ⚠️
• In azure: Absent ⚠️
• In gcp: Absent ⚠️
• In lowlatency: Absent ⚠️

Differences

Regular

• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅