DepSurf

Function: check_msr

Status

Regular

• In 4.4: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8107c6a6)
  Location: arch/x86/events/intel/core.c:3117
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8107c6a6-ffffffff8107c755: check_msr (STB_LOCAL)
  

• In 4.8: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8107e01c)
  Location: arch/x86/events/intel/core.c:3405
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8107e01c-ffffffff8107e121: check_msr (STB_LOCAL)
  

• In 4.10: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff810825bc)
  Location: arch/x86/events/intel/core.c:3425
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff810825bc-ffffffff810826c1: check_msr (STB_LOCAL)
  

• In 4.13: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100c9ca)
  Location: arch/x86/events/intel/core.c:3589
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100c9ca-ffffffff8100cad0: check_msr (STB_LOCAL)
  

• In 4.15: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100cf6a)
  Location: arch/x86/events/intel/core.c:3607
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100cf6a-ffffffff8100d067: check_msr (STB_LOCAL)
  

• In 4.18: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100d69a)
  Location: arch/x86/events/intel/core.c:3632
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100d69a-ffffffff8100d797: check_msr (STB_LOCAL)
  

• In 5.0: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100db65)
  Location: arch/x86/events/intel/core.c:3878
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100db65-ffffffff8100dc62: check_msr (STB_LOCAL)
  

• In 5.3: Selective Inline, Transformation ⚠️

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8289ee3a)
  Location: arch/x86/events/intel/core.c:4052
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100e432-ffffffff8100e52f: check_msr.part.0 (STB_LOCAL)
  

• In 5.4: Selective Inline, Transformation ⚠️

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff828a1eeb)
  Location: arch/x86/events/intel/core.c:4070
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100ea72-ffffffff8100eb6f: check_msr.part.0 (STB_LOCAL)
  

• In 5.8: Selective Inline, Transformation ⚠️

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8100fe1a)
  Location: arch/x86/events/intel/core.c:4108
  Inline: True
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100fe1a-ffffffff8100ff08: check_msr.part.0 (STB_LOCAL)
  ffffffff8100ff08-ffffffff8100ff28: check_msr (STB_LOCAL)
  

• In 5.11: Selective Inline, Transformation ⚠️

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81bd217d)
  Location: arch/x86/events/intel/core.c:4475
  Inline: True
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff81bd217d-ffffffff81bd2265: check_msr.part.0 (STB_LOCAL)
  ffffffff81bd2265-ffffffff81bd2285: check_msr (STB_LOCAL)
  

• In 5.13: Selective Inline ⚠️

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81bc43c9)
  Location: arch/x86/events/intel/core.c:4762
  Inline: True
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff81bc43c9-ffffffff81bc44e1: check_msr (STB_LOCAL)
  

• In 5.15: Selective Inline ⚠️

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: Selective

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81c95909)
  Location: arch/x86/events/intel/core.c:4782
  Inline: True
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff81c95909-ffffffff81c95a21: check_msr (STB_LOCAL)
  

• In 5.19: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81e44b34)
  Location: arch/x86/events/intel/core.c:4852
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff81e44b34-ffffffff81e44c53: check_msr (STB_LOCAL)
  

• In 6.2: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81014ea0)
  Location: arch/x86/events/intel/core.c:4978
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff81014ea0-ffffffff81014fdf: check_msr (STB_LOCAL)
  

• In 6.5: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff81014700)
  Location: arch/x86/events/intel/core.c:5109
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff81014700-ffffffff8101483f: check_msr (STB_LOCAL)
  

• In 6.8: ✅

  bool check_msr(long unsigned int msr, u64 mask);
  

  Collision: Unique Static

  Inline: No

  Transformation: False

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8101a1b0)
  Location: arch/x86/events/intel/core.c:5273
  Inline: False
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8101a1b0-ffffffff8101a2ef: check_msr (STB_LOCAL)
  

Arch

• In arm64: Absent ⚠️
• In armhf: Absent ⚠️
• In ppc64el: Absent ⚠️
• In riscv64: Absent ⚠️

Flavor

• In aws: Selective Inline, Transformation ⚠️

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8288feeb)
  Location: arch/x86/events/intel/core.c:4070
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100ea72-ffffffff8100eb6f: check_msr.part.0 (STB_LOCAL)
  

• In azure: Selective Inline, Transformation ⚠️

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff8288de27)
  Location: arch/x86/events/intel/core.c:4070
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100d7e0-ffffffff8100d8ce: check_msr.part.0 (STB_LOCAL)
  

• In gcp: Selective Inline, Transformation ⚠️

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff828a2eeb)
  Location: arch/x86/events/intel/core.c:4070
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100ea32-ffffffff8100eb2f: check_msr.part.0 (STB_LOCAL)
  

• In lowlatency: Selective Inline, Transformation ⚠️

  Collision: Unique Static

  Inline: Selective

  Transformation: True

  Instances:

  In arch/x86/events/intel/core.c (ffffffff828a2eff)
  Location: arch/x86/events/intel/core.c:4070
  Inline: True
  Inline callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  Direct callers:
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
    - arch/x86/events/intel/core.c:intel_pmu_init
  

  Symbols:

  ffffffff8100ec02-ffffffff8100ecff: check_msr.part.0 (STB_LOCAL)
  

Differences

Regular

• No changes between 4.4 and 4.8 ✅
• No changes between 4.8 and 4.10 ✅
• No changes between 4.10 and 4.13 ✅
• No changes between 4.13 and 4.15 ✅
• No changes between 4.15 and 4.18 ✅
• No changes between 4.18 and 5.0 ✅
• No changes between 5.8 and 5.11 ✅
• No changes between 5.11 and 5.13 ✅
• No changes between 5.13 and 5.15 ✅
• No changes between 5.15 and 5.19 ✅
• No changes between 5.19 and 6.2 ✅
• No changes between 6.2 and 6.5 ✅
• No changes between 6.5 and 6.8 ✅